gateware: imports cleanup. NFC.

whitequark · Dec 12, 2018 · 775fdc0 · 775fdc0
1 parent bbf2464
commit 775fdc0
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diff --git a/software/glasgow/applet/benchmark/__init__.py b/software/glasgow/applet/benchmark/__init__.py
@@ -3,7 +3,6 @@
 import struct
 import time
 from migen import *
-from migen.genlib.fsm import *
 
 from .. import *
 from ...gateware.lfsr import *

diff --git a/software/glasgow/applet/hd44780/__init__.py b/software/glasgow/applet/hd44780/__init__.py
@@ -10,7 +10,6 @@
 import argparse
 import logging
 from migen import *
-from migen.genlib.fsm import *
 from migen.genlib.cdc import MultiReg
 
 from .. import *

diff --git a/software/glasgow/applet/i2c_master/__init__.py b/software/glasgow/applet/i2c_master/__init__.py
@@ -2,7 +2,6 @@
 import logging
 import math
 from migen import *
-from migen.genlib.fsm import *
 
 from .. import *
 from ...support.pyrepl import *

diff --git a/software/glasgow/applet/program_ice40/__init__.py b/software/glasgow/applet/program_ice40/__init__.py
@@ -2,7 +2,6 @@
 import argparse
 import logging
 from migen import *
-from migen.genlib.fsm import *
 
 from .. import *
 

diff --git a/software/glasgow/applet/rgb_grabber/__init__.py b/software/glasgow/applet/rgb_grabber/__init__.py
@@ -1,7 +1,6 @@
 import logging
 import math
 from migen import *
-from migen.genlib.fsm import *
 from migen.genlib.cdc import *
 
 from .. import *

diff --git a/software/glasgow/applet/spi_master/__init__.py b/software/glasgow/applet/spi_master/__init__.py
@@ -3,7 +3,6 @@
 import asyncio
 import math
 from migen import *
-from migen.genlib.fsm import *
 from migen.genlib.cdc import *
 
 from .. import *

diff --git a/software/glasgow/applet/swd/__init__.py b/software/glasgow/applet/swd/__init__.py
@@ -5,8 +5,6 @@
 import struct
 import math
 from migen import *
-from migen.fhdl.bitcontainer import value_bits_sign
-from migen.genlib.fsm import *
 
 from .. import *
 from ...gateware.pads import *

diff --git a/software/glasgow/applet/uart/__init__.py b/software/glasgow/applet/uart/__init__.py
@@ -3,7 +3,6 @@
 import logging
 import asyncio
 from migen import *
-from migen.genlib.fsm import *
 
 from .. import *
 from ...gateware.pads import *

diff --git a/software/glasgow/applet/vga_terminal/cpu.py b/software/glasgow/applet/vga_terminal/cpu.py
@@ -34,7 +34,6 @@
 #   * HLT            ≡  halt
 
 from migen import *
-from migen.genlib.fsm import *
 
 
 __all__ = [

diff --git a/software/glasgow/gateware/analyzer.py b/software/glasgow/gateware/analyzer.py
@@ -1,7 +1,6 @@
 from functools import reduce
 from collections import OrderedDict
 from migen import *
-from migen.fhdl.bitcontainer import log2_int
 from migen.genlib.fifo import _FIFOInterface, SyncFIFOBuffered
 from migen.genlib.coding import PriorityEncoder, PriorityDecoder
 from migen.genlib.fsm import FSM

diff --git a/software/glasgow/gateware/boneless.py b/software/glasgow/gateware/boneless.py
@@ -1,7 +1,4 @@
 from migen import *
-from migen.fhdl.bitcontainer import value_bits_sign
-from migen.fhdl.specials import _MemoryPort
-from migen.genlib.fsm import *
 
 from ..arch.boneless.opcode import *
 

diff --git a/software/glasgow/gateware/fx2.py b/software/glasgow/gateware/fx2.py
@@ -24,7 +24,6 @@
 # FIFOADR->FIFODATA             14.3
 
 from migen import *
-from migen.genlib.fsm import *
 from migen.genlib.cdc import MultiReg
 from migen.genlib.fifo import _FIFOInterface, AsyncFIFO, SyncFIFO, SyncFIFOBuffered
 from migen.genlib.resetsync import AsyncResetSynchronizer

diff --git a/software/glasgow/gateware/i2c.py b/software/glasgow/gateware/i2c.py
@@ -1,7 +1,6 @@
 # I2C reference: https://www.nxp.com/docs/en/user-guide/UM10204.pdf
 
 from migen import *
-from migen.genlib.fsm import *
 from migen.genlib.cdc import MultiReg
 
 

diff --git a/software/glasgow/gateware/mpsse.py b/software/glasgow/gateware/mpsse.py
@@ -3,7 +3,6 @@
 # http://www.ftdichip.com/Support/Documents/AppNotes/ AN_108_Command_Processor_for_MPSSE_and_MCU_Host_Bus_Emulation_Modes.pdf
 
 from migen import *
-from migen.genlib.fsm import *
 from migen.genlib.cdc import MultiReg
 
 

diff --git a/software/glasgow/gateware/registers.py b/software/glasgow/gateware/registers.py
@@ -1,5 +1,4 @@
 from migen import *
-from migen.genlib.fsm import *
 
 
 __all__ = ["Registers", "I2CRegisters"]

diff --git a/software/glasgow/gateware/uart.py b/software/glasgow/gateware/uart.py
@@ -1,5 +1,4 @@
 from migen import *
-from migen.genlib.fsm import *
 from migen.genlib.cdc import MultiReg
 
 

diff --git a/software/glasgow/target/analyzer.py b/software/glasgow/target/analyzer.py
@@ -1,6 +1,5 @@
 import logging
 from migen import *
-from migen.fhdl.bitcontainer import value_bits_sign
 from migen.genlib.cdc import MultiReg
 from migen.genlib.fifo import _FIFOInterface