Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

lib.cdc: add optional reset to MultiReg, and document its use cases #44

Closed
wants to merge 1 commit into from

Conversation

Wren6991
Copy link
Contributor

Following on from #37.

This patch adds a reset_less parameter to MultiReg. The default behaviour is the same as the original behaviour. It also adds a docstring to MultiReg which, besides usual docstring stuff, adds the following footnote:

    Note on Reset
    -------------
    MultiReg is non-resettable by default. Usually this is the safest option;
    on FPGA the MultiReg will still be initialised to its `reset` value,
    when the FPGA loads its configuration bitstream.

    However, in designs where the value of the MultiReg must be valid
    immediately after reset, consider `reset_less`=False if:
     - You are targeting an ASIC, or an FPGA that does not initialise
       flipflop values
     - Your design features warm (non-power-on) resets of `odomain`, so
       the one-time initialisation at power on is insufficient
     - Your design features a sequenced reset, and the MultiReg must maintain
       its reset value until `odomain` reset specifically is deasserted.

    MultiRegs are reset by the `odomain` reset only.

I made sure to make it explicit that the default behaviour relies on FPGA bitstream config. Not sure if this is exactly the kind of documentation you intended -- let me know and I will fix it up :)

Thanks

@codecov
Copy link

codecov bot commented Mar 19, 2019

Codecov Report

Merging #44 into master will not change coverage.
The diff coverage is 100%.

Impacted file tree graph

@@          Coverage Diff           @@
##           master     #44   +/-   ##
======================================
  Coverage    85.5%   85.5%           
======================================
  Files          27      27           
  Lines        3912    3912           
  Branches      764     764           
======================================
  Hits         3345    3345           
  Misses        478     478           
  Partials       89      89
Impacted Files Coverage Δ
nmigen/lib/cdc.py 86.66% <100%> (ø) ⬆️

Continue to review full report at Codecov.

Legend - Click here to learn more
Δ = absolute <relative> (impact), ø = not affected, ? = missing data
Powered by Codecov. Last update d69a4e2...8a062aa. Read the comment docs.

@whitequark
Copy link
Contributor

Thank you! I've manually merged this PR, with the following changes:

  • Some typos (int instead of bool, etc).
  • In ReST, single backticks are used for emphasis, double backticks are used for code/monospace.
  • Clarified some details in the note on reset (all FPGAs allow initializing flip-flops to at least zero; any of the listed conditions can be true for the reset to become necessary).
  • Reflowed the text for 100 columns, which is what's used in this codebase.

@whitequark whitequark closed this Mar 28, 2019
@Wren6991
Copy link
Contributor Author

int instead of bool, etc

Oops, potentially bad C codebase at work leaking through.

Thanks for merging, and sorry for the mess; that's great feedback. I'll go and rebase + fix up my other PR based on this.

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

Successfully merging this pull request may close these issues.

None yet

2 participants