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Global on clock pin is unroutable on tinyfpga_bx platform #82

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zignig opened this issue Jun 4, 2019 · 2 comments
Closed

Global on clock pin is unroutable on tinyfpga_bx platform #82

zignig opened this issue Jun 4, 2019 · 2 comments

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@zignig
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zignig commented Jun 4, 2019

Trying to run the latest master and test the tinyFPGA_bx platform.

code

from nmigen import *
from nmigen.vendor.board.tinyfpga_bx import *


class Blinky(Elaboratable):
    def elaborate(self, platform):
        clk16   = platform.request("clk16", 0)
        user_led = platform.request("user_led", 0)
        counter  = Signal(22)

        m = Module()
        m.domains.sync = ClockDomain()
        m.d.comb += ClockSignal().eq(clk16.i)
        m.d.sync += counter.eq(counter + 1)
        m.d.comb += user_led.o.eq(counter[-1])
        return m


if __name__ == "__main__":
    platform = TinyFPGABXPlatform()
    platform.build(Blinky(), do_program=True)

yields

ERROR: BEL 'X0/Y30/io0' has no global buffer connection available
ERROR: Packing design failed.
0 warnings, 2 errors
Traceback (most recent call last):
  File "blinky.py", line 21, in <module>
    platform.build(Blinky(), do_program=True)
  File "/usr/local/lib/python3.6/dist-packages/nmigen/build/plat.py", line 108, in build
    products = plan.execute(build_dir)
  File "/usr/local/lib/python3.6/dist-packages/nmigen/build/plat.py", line 52, in execute
    subprocess.run(["sh", "{}.sh".format(self.script)], check=True)
  File "/usr/lib/python3.6/subprocess.py", line 418, in run
    output=stdout, stderr=stderr)
subprocess.CalledProcessError: Command '['sh', 'build_top.sh']' returned non-zero exit status 255.

@zignig zignig changed the title Global on clock pin is unroutable Global on clock pin is unroutable on tinyfpga_bx platform Jun 4, 2019
@whitequark
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That's so strange; TinyFPGA BX does not connect the clock to a global-capable pin:
Screenshot_20190604_064226

@zignig
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zignig commented Jun 4, 2019

Weird , have put an issue onto the tinyfpga_bx repo.

I am also having some weirdness with clocks not propagating into submodules , will make an issue with code example when I have isolated it.

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