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base repository: m-labs/nmigen
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compare: f60ceb349b1c
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  • 1 commit
  • 2 files changed
  • 1 contributor

Commits on Jun 25, 2019

  1. vendor.xilinx_{spartan6,7series}: speedgrade→speed.

    For consistency with ECP5.
    whitequark committed Jun 25, 2019
    Copy the full SHA
    f60ceb3 View commit details
Showing with 8 additions and 8 deletions.
  1. +4 −4 nmigen/vendor/xilinx_7series.py
  2. +4 −4 nmigen/vendor/xilinx_spartan6.py
8 changes: 4 additions & 4 deletions nmigen/vendor/xilinx_7series.py
Original file line number Diff line number Diff line change
@@ -42,9 +42,9 @@ class Xilinx7SeriesPlatform(TemplatedPlatform):
* ``{{name}}.bit``: binary bitstream.
"""

device = abstractproperty()
device = abstractproperty()
package = abstractproperty()
speedgrade = abstractproperty()
speed = abstractproperty()

file_templates = {
**TemplatedPlatform.build_script_templates,
@@ -54,7 +54,7 @@ class Xilinx7SeriesPlatform(TemplatedPlatform):
""",
"{{name}}.tcl": r"""
# {{autogenerated}}
create_project -force -name {{name}} -part {{platform.device}}{{platform.package}}-{{platform.speedgrade}}
create_project -force -name {{name}} -part {{platform.device}}{{platform.package}}-{{platform.speed}}
{% for file in platform.extra_files %}
{% if file.endswith((".v", ".sv")) -%}
add_files {{file}}
@@ -63,7 +63,7 @@ class Xilinx7SeriesPlatform(TemplatedPlatform):
add_files {{name}}.v
read_xdc {{name}}.xdc
{{get_override("script_after_read")|default("# (script_after_read placeholder)")}}
synth_design -top {{name}} -part {{platform.device}}{{platform.package}}-{{platform.speedgrade}}
synth_design -top {{name}} -part {{platform.device}}{{platform.package}}-{{platform.speed}}
{{get_override("script_after_synth")|default("# (script_after_synth placeholder)")}}
report_timing_summary -file {{name}}_timing_synth.rpt
report_utilization -hierarchical -file {{name}}_utilization_hierachical_synth.rpt
8 changes: 4 additions & 4 deletions nmigen/vendor/xilinx_spartan6.py
Original file line number Diff line number Diff line change
@@ -45,9 +45,9 @@ class XilinxSpartan6Platform(TemplatedPlatform):
* ``{{name}}.bit``: binary bitstream.
"""

device = abstractproperty()
package = abstractproperty()
speedgrade = abstractproperty()
device = abstractproperty()
package = abstractproperty()
speed = abstractproperty()

file_templates = {
**TemplatedPlatform.build_script_templates,
@@ -70,7 +70,7 @@ class XilinxSpartan6Platform(TemplatedPlatform):
-ifn {{name}}.prj
-ofn {{name}}.ngc
-top {{name}}
-p {{platform.device}}{{platform.package}}-{{platform.speedgrade}}
-p {{platform.device}}{{platform.package}}-{{platform.speed}}
{{get_override("script_after_run")|default("# (script_after_run placeholder)")}}
""",
"{{name}}.ucf": r"""