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gateware.clockgen: avoid spurious stb_r/stb_f pulses.
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whitequark committed May 3, 2019
1 parent b569ce3 commit 5d174d6
Showing 1 changed file with 6 additions and 4 deletions.
10 changes: 6 additions & 4 deletions software/glasgow/gateware/clockgen.py
Expand Up @@ -71,20 +71,22 @@ def __init__(self, cyc):
# General case.
# Implementation: counter.
counter = Signal(max=cyc)
clk_r = Signal()
self.sync += [
counter.eq(counter - 1),
If(counter == 0,
counter.eq(cyc - 1),
),
If(self.stb_r,
If(counter == cyc // 2,
self.clk.eq(1),
).Elif(self.stb_f,
).Elif(counter == 0,
self.clk.eq(0),
),
clk_r.eq(self.clk),
]
self.comb += [
self.stb_r.eq(counter == cyc // 2),
self.stb_f.eq(counter == 0),
self.stb_r.eq(~clk_r & self.clk),
self.stb_f.eq( clk_r & ~self.clk),
]

@staticmethod
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