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base repository: m-labs/nmigen
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head repository: m-labs/nmigen
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compare: da1f58b7aef9
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  • 3 commits
  • 2 files changed
  • 1 contributor

Commits on Jul 7, 2019

  1. hdl.dsl: gracefully handle FSM with no states.

    whitequark committed Jul 7, 2019
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    3388b5b View commit details
  2. hdl.dsl: clarify error message for incorrect nesting.

    Refs #133.
    whitequark committed Jul 7, 2019
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    cb8be4a View commit details
  3. hdl.dsl: further clarify error message for incorrect nesting.

    Fixes #133.
    whitequark committed Jul 7, 2019
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    da1f58b View commit details
Showing with 31 additions and 3 deletions.
  1. +10 −2 nmigen/hdl/dsl.py
  2. +21 −1 nmigen/test/test_hdl_dsl.py
12 changes: 10 additions & 2 deletions nmigen/hdl/dsl.py
Original file line number Diff line number Diff line change
@@ -133,8 +133,14 @@ def _check_context(self, construct, context):
raise SyntaxError("{} is not permitted outside of {}"
.format(construct, context))
else:
raise SyntaxError("{} is not permitted inside of {}"
.format(construct, self._ctrl_context))
if self._ctrl_context == "Switch":
secondary_context = "Case"
if self._ctrl_context == "FSM":
secondary_context = "State"
raise SyntaxError("{} is not permitted directly inside of {}; it is permitted "
"inside of {} {}"
.format(construct, self._ctrl_context,
self._ctrl_context, secondary_context))

def _get_ctrl(self, name):
if self._ctrl_stack:
@@ -337,6 +343,8 @@ def _pop_ctrl(self):
if name == "FSM":
fsm_signal, fsm_reset, fsm_encoding, fsm_decoding, fsm_states = \
data["signal"], data["reset"], data["encoding"], data["decoding"], data["states"]
if not fsm_states:
return
fsm_signal.nbits = bits_for(len(fsm_encoding) - 1)
if fsm_reset is None:
fsm_signal.reset = fsm_encoding[next(iter(fsm_states))]
22 changes: 21 additions & 1 deletion nmigen/test/test_hdl_dsl.py
Original file line number Diff line number Diff line change
@@ -345,7 +345,8 @@ def test_If_inside_Switch_wrong(self):
m = Module()
with m.Switch(self.s1):
with self.assertRaises(SyntaxError,
msg="If is not permitted inside of Switch"):
msg="If is not permitted directly inside of Switch; "
"it is permitted inside of Switch Case"):
with m.If(self.s2):
pass

@@ -449,6 +450,14 @@ def test_FSM_ongoing(self):
)
""")

def test_FSM_empty(self):
m = Module()
with m.FSM():
pass
self.assertRepr(m._statements, """
()
""")

def test_FSM_wrong_redefined(self):
m = Module()
with m.FSM():
@@ -472,6 +481,17 @@ def test_FSM_wrong_next(self):
with m.FSM():
m.next = "FOO"

def test_If_inside_FSM_wrong(self):
m = Module()
with m.FSM():
with m.State("FOO"):
pass
with self.assertRaises(SyntaxError,
msg="If is not permitted directly inside of FSM; "
"it is permitted inside of FSM State"):
with m.If(self.s2):
pass

def test_auto_pop_ctrl(self):
m = Module()
with m.If(self.w1):