Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Jump to bottom

Handle edge case where the same Subsignal uses multiple Connectors #18

Closed
cr1901 opened this issue Jul 7, 2019 · 1 comment
Closed

Handle edge case where the same Subsignal uses multiple Connectors #18

cr1901 opened this issue Jul 7, 2019 · 1 comment
Labels
question

Comments

@cr1901
Copy link
Contributor

cr1901 commented Jul 7, 2019 •
edited

Occasionally, it is possible a user will want to add their custom Resource to their boards Connectors that matches the following conditions:

  • A Subsignal of their shiny new Resource has multiple Pins that should be associated with it.
  • The Pins of this Subsignal will be spread out across multiple Connectors.

omigen already handles this case by hardcoding the connector to use into the Pins string, as per this example on the b Subsignal.

What should the equivalent nmigen behavior be?

My Proposal

vga = [
        ("vga_out", 0,
            Subsignal("hsync", PinsN("3", dir="o", conn=("led", 0))),
            Subsignal("vsync", PinsN("4", dir="o", conn=("led", 0))),

            Subsignal("r", Pins("1 2 3", dir="o", conn=("dio", 0))),
            Subsignal("g", Pins("4 5 6", dir="o", conn=("dio", 0))),
            Subsignal("b", Pins("7", dir="o", conn=("dio", 0)),
                           Pins("1", dir="o", conn=("clkio", 0))),
            Attrs(IOSTANDARD="LVCMOS33", SLEW="FAST")
        )
    ]
@whitequark
Copy link
Contributor

whitequark commented Jul 7, 2019 •
edited

That's already handled by doing something like:

vga = [
        ("vga_out", 0,
            Subsignal("hsync", PinsN("led_0:3", dir="o")),
            Subsignal("vsync", PinsN("led_0:4", dir="o")),

            Subsignal("r", Pins("dio_0:1 dio_0:2 dio_0:3", dir="o")),
            Subsignal("g", Pins("dio_0:4 dio_0:5 dio_0:6", dir="o")),
            Subsignal("b", Pins("dio_0:7 clkio_0:1", dir="o")),
            Attrs(IOSTANDARD="LVCMOS33", SLEW="FAST")
        )
    ]

Closed
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Assignees
No one assigned
Labels
question
Projects
None yet
Milestone
No milestone
Development

No branches or pull requests
2 participants
@whitequark @cr1901