Codecov Report

Merging #45 into master will increase coverage by 5.34%.
The diff coverage is 100%.

@@            Coverage Diff             @@
##           master      #45      +/-   ##
==========================================
+ Coverage   80.56%   85.91%   +5.34%     
==========================================
  Files          32       28       -4     
  Lines        5382     4075    -1307     
  Branches     1166      818     -348     
==========================================
- Hits         4336     3501     -835     
+ Misses        907      480     -427     
+ Partials      139       94      -45

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I am wondering if the nMigen CRG implementation should take into account FPGAs like iCE40, where the BRAMs cannot be accessed for some time after startup. (This is very poorly documented but it's a hard requirement...)

So, my CRG for iCE40 uses a timer.

I am wondering if the nMigen CRG implementation should take into account FPGAs like iCE40, where the BRAMs cannot be accessed for some time after startup. (This is very poorly documented but it's a hard requirement...)

Is this what you meant ?

Yes. Isn't it sufficient to use ResetInserter here?

I think there is no particular need for a generic CRG in nMigen because various vendor.* packages use highly platform-specific reset generation and clock gating gateware which is much better at this job.