Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Jump to bottom

Level shifter state during reconfiguraiton? #96

Closed
whitequark opened this issue Jan 28, 2019 · 4 comments
Closed

Level shifter state during reconfiguraiton? #96

whitequark opened this issue Jan 28, 2019 · 4 comments
Labels
qualification Lifecycle stage: qualification revC Hardware revision: C
Milestone
Preview 1

Comments

@whitequark
Copy link
Member

It looks like we are constrained in level shifter routing: the DIR input is referenced to VCCA. When DIR is low, B is an input. Ideally, we would have this as the state of the tool when the FPGA is reconfigured, but AFAIK the FPGA pins are all set to be weak pullups.

Should we add external pulldowns? This seems... basically impossible placement-wise.

The alternative is to force the entire level shifter into a high impedance state by disabling the voltage regulators. (Good thinking, @marcan--if we powered level shifters directly from Vsense this would not be possible.) The problem is that discharging the output capacitor below the cutoff level may take a while and we cannot directly determine when this happens. So it would be a hardcoded worst-case delay in the FPGA reconfiguration code.

Thoughts?
@whitequark whitequark added revC Hardware revision: C qualification Lifecycle stage: qualification labels Jan 28, 2019
@marcan
Copy link
Member

marcan commented Jan 28, 2019

Pull-downs are plausible on the back side. It won't be fun but I think it's doable. We already have a couple of resistors back there.

Our only static load on VIO is the feedback divider, which is 83kΩ. We have about 6µF of capacitance on that bus, so not considering any external capacitance, that's a tRC of half a second. Not terrible, not great. The easiest change to improve this would be to dump a 1kΩ discharge resistor on there (easy to retrofit to revC0 units), which would add a worst-case load of 5mA and reduce the tRC to 6ms. This is probably a good idea anyway, we'd want level changes on that rail to be responsive.

@marcan
Copy link
Member

marcan commented Jan 28, 2019

I couldn't find a proper threshold for the shifters to shut down, but I'm guessing 3tRC will probably do it in all cases (that's 5V to 0.23V).

@whitequark
Copy link
Member Author

Discharge resistor sounds great, and we need that regardless of this issue--I think I've hit the problem with rails changing too slowly before.

We can qualify the level shifter threshold easily, at least the ballpark.

@whitequark whitequark mentioned this issue Mar 1, 2019
Closed
@whitequark whitequark added this to the Preview 1 milestone Mar 8, 2019
@marcan
Copy link
Member

marcan commented Mar 28, 2019

Let's call this closed for revC1. Discharge resistors are there, we can revisit and add pull-downs if it becomes a problem.

@marcan marcan closed this as completed Mar 28, 2019
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Assignees
No one assigned
Labels
qualification Lifecycle stage: qualification revC Hardware revision: C
Projects
None yet
Milestone
Preview 1
Development

No branches or pull requests
2 participants
@whitequark @marcan