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base repository: m-labs/nmigen
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head repository: m-labs/nmigen
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compare: 358b98e5def7
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  • 1 commit
  • 2 files changed
  • 1 contributor

Commits on Jun 2, 2019

  1. vendor.tinyfpga_b: implement.

    zignig authored and whitequark committed Jun 2, 2019
    Copy the full SHA
    358b98e View commit details
Showing with 44 additions and 1 deletion.
  1. +11 −1 nmigen/vendor/fpga/lattice_ice40.py
  2. +33 −0 nmigen/vendor/tinyfpga_b.py
12 changes: 11 additions & 1 deletion nmigen/vendor/fpga/lattice_ice40.py
Original file line number Diff line number Diff line change
@@ -6,7 +6,7 @@
from ...build import *


__all__ = ["LatticeICE40Platform", "IceStormProgrammerMixin", "IceBurnProgrammerMixin"]
__all__ = ["LatticeICE40Platform", "IceStormProgrammerMixin", "IceBurnProgrammerMixin", "TinyProgrammerMixin"]


class LatticeICE40Platform(TemplatedPlatform):
@@ -132,3 +132,13 @@ def toolchain_program(self, products, name):
with tempfile.NamedTemporaryFile(prefix="nmigen_iceburn_") as bitstream_file:
bitstream_file.write(bitstream)
subprocess.run([iceburn, "-evw", bitstream_file.name], check=True)


class TinyProgrammerMixin:
def toolchain_program(self, products, name):
tinyprog = os.environ.get("TINYPROG", "tinyprog")
options = ["-p"]
bitstream = products.get("{}.bin".format(name))
with tempfile.NamedTemporaryFile(prefix="nmigen_tinyprog_") as bitstream_file:
bitstream_file.write(bitstream)
subprocess.run([tinyprog, *options, bitstream_file.name], check=True)
33 changes: 33 additions & 0 deletions nmigen/vendor/tinyfpga_b.py
Original file line number Diff line number Diff line change
@@ -0,0 +1,33 @@
from ..build import *
from .fpga.lattice_ice40 import LatticeICE40Platform, TinyProgrammerMixin


__all__ = ["TinyFPGABPlatform"]


class TinyFPGABPlatform(TinyProgrammerMixin, LatticeICE40Platform):
device = "lp8k"
package = "cm81"
clocks = [
("clk16", 16e6),
]
resources = [
Resource("clk16", 0, Pins("B2", dir="i"), extras=["IO_STANDARD=LVCMOS33"]),

Resource("user_led", 0, Pins("B3", dir="o"), extras=["IO_STANDARD=LVCMOS33"]),

Resource("usb", 0,
Subsignal("d_p", Pins("B4", dir="io")),
Subsignal("d_n", Pins("A4", dir="io")),
Subsignal("pull_up", Pins("A3", dir="o")),
extras=["IO_STANDARD=SB_LVCMOS33"]
),

Resource("spiflash", 0,
Subsignal("cs_n", Pins("F7", dir="o")),
Subsignal("clk", Pins("G7", dir="o")),
Subsignal("mosi", Pins("G6", dir="io")),
Subsignal("miso", Pins("H7", dir="io")),
extras=["IO_STANDARD=SB_LVCMOS33"]
),
]