Clean up Xilinx platform code #104
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added 3 commits
June 15, 2019 15:55
Before this commit, in some cases there will be an inverter, which is not allowed on an FDCE with IOB attribute set to true, as it will interfere with packing.
Eliminate some intermediate signals if they are not necessary. Do not even return i, o, or t if the pin does not have them.
Do this to make sure all buffers, tristate/differential or not, are instantiated the exact same way, and are subject to the same set of toolchain bugs, if any.
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@jfng Can you please review this, and make sure I didn't break anything? The main part here is the commit that removes the inverter between the register (FDCE) and tristate input of the IOB. The rest is just misc cleanups that remove intermediate signals and ensure that if a pin doesn't have e.g. the
isignal, there is noisignal returned from_get_xdr_buffer.