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base repository: GlasgowEmbedded/glasgow
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base: 724208f50189
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head repository: GlasgowEmbedded/glasgow
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compare: 6443c705c475
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  • 1 commit
  • 1 file changed
  • 1 contributor

Commits on Mar 12, 2019

  1. applet.interface.spi_master: add omissions from commit 724208f.

    @whitequark
    whitequark committed Mar 12, 2019
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    6443c70 View commit details
Showing with 2 additions and 2 deletions.
  1. +2 −2 software/glasgow/applet/interface/spi_master/__init__.py
4 changes: 2 additions & 2 deletions software/glasgow/applet/interface/spi_master/__init__.py
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Original file line number Diff line number Diff line change
@@ -302,10 +302,10 @@ def add_build_arguments(cls, parser, access, omit_pins=False):
"--ss-active", metavar="LEVEL", type=int, choices=[0, 1], default=0,
help="set active chip select level to LEVEL (default: %(default)s")

def build(self, target, args):
def build(self, target, args, pins=__pins):
self.mux_interface = iface = target.multiplexer.claim_interface(self, args)
return iface.add_subtarget(SPIMasterSubtarget(
pads=iface.get_pads(args, pins=self.__pins),
pads=iface.get_pads(args, pins=pins),
out_fifo=iface.get_out_fifo(),
in_fifo=iface.get_in_fifo(auto_flush=False),
period_cyc=math.ceil(target.sys_clk_freq / (args.bit_rate * 1000)),