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base repository: whitequark/glasgow
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head repository: whitequark/glasgow
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compare: dcfaa3188179
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  • 1 commit
  • 1 file changed
  • 1 contributor

Commits on Dec 21, 2018

  1. gateware.boneless: nicer naming in tests. NFC. 

    This mostly affects nMigen.
    @whitequark
    whitequark committed Dec 21, 2018
    Copy the full SHA
    dcfaa31 View commit details
Showing with 6 additions and 4 deletions.
  1. +6 −4 software/glasgow/gateware/boneless.py
10 changes: 6 additions & 4 deletions software/glasgow/gateware/boneless.py
View file
Original file line number Diff line number Diff line change
@@ -373,20 +373,22 @@ def __init__(self):

def do_finalize(self):
self.mem = Memory(width=16, depth=len(self.mem_init), init=self.mem_init)
self.specials += self.mem
self.specials.mem = self.mem

mem_rdport = self.mem.get_port(has_re=True, mode=READ_FIRST)
mem_wrport = self.mem.get_port(write_capable=True)
self.specials += [mem_rdport, mem_wrport]
self.specials.mem_r = mem_rdport
self.specials.mem_w = mem_wrport

if self.ext_init:
self.ext = Memory(width=16, depth=len(self.ext_init), init=self.ext_init)
self.specials += self.ext
self.specials.ext = self.ext

ext_port = self.ext.get_port(has_re=True, write_capable=True)
self.specials += ext_port
self.specials.ext_rw = ext_port
else:
ext_port = _StubMemoryPort("ext")
self.submodules.ext_rw = ext_port

self.submodules.dut = BonelessCore(reset_addr=8,
mem_rdport=mem_rdport,