whitequark · Feb 19, 2019 · Feb 19, 2019
Showing with 69 additions and 33 deletions.

+4 −5 software/glasgow/access/direct/arguments.py

+65 −28 software/glasgow/applet/audio_output/__init__.py
diff --git a/software/glasgow/access/direct/arguments.py b/software/glasgow/access/direct/arguments.py
@@ -75,9 +75,6 @@ def _add_pin_set_argument(self, parser, name, width, default, required):
         if default is not None:
             help += " (default: %(default)s)"
 
-        if isinstance(width, int):
-            width = range(width, width + 1)
-
         opt_name = "--pins-" + name.lower().replace("_", "-")
         parser.add_argument(
             opt_name, dest="pin_set_{}".format(name), metavar="SET",
@@ -108,8 +105,10 @@ def add_pin_argument(self, parser, name, default=None, required=False):
         self._add_pin_argument(parser, name, default, required)
 
     def add_pin_set_argument(self, parser, name, width, default=None, required=False):
-        if default is True and len(self._free_pins) >= width:
-            default = ",".join([str(self._get_free(self._free_pins)) for _ in range(width)])
+        if isinstance(width, int):
+            width = range(width, width + 1)
+        if default is True and len(self._free_pins) >= width.start:
+            default = ",".join([str(self._get_free(self._free_pins)) for _ in width])
         self._add_pin_set_argument(parser, name, width, default, required)
 
     def add_run_arguments(self, parser):

diff --git a/software/glasgow/applet/audio_output/__init__.py b/software/glasgow/applet/audio_output/__init__.py
@@ -6,15 +6,28 @@
 from ...gateware.pads import *
 
 
+class AudioOutputChannel(Module):
+    def __init__(self, output, bits):
+        self.level = Signal(bits)
+        self.latch = Signal(bits)
+        self.stb   = Signal()
+
+        ###
+
+        self.accum = Signal(bits)
+        self.sync += Cat(self.accum, output).eq(self.accum + self.latch)
+
+        self.sync += If(self.stb, self.latch.eq(self.level))
+
+
 class AudioOutputSubtarget(Module):
     def __init__(self, pads, out_fifo, sample_cyc, width):
         assert width in (1, 2)
 
         timer = Signal(max=sample_cyc)
-        accum = Signal(width * 8)
-        level = Signal(width * 8)
 
-        self.sync += Cat(accum, pads.o_t.o).eq(accum + level)
+        channels = [AudioOutputChannel(output, bits=width * 8) for output in pads.o_t.o]
+        self.submodules += channels
 
         self.submodules.fsm = FSM()
         self.fsm.act("STANDBY",
@@ -27,30 +40,49 @@ def __init__(self, pads, out_fifo, sample_cyc, width):
         self.fsm.act("WAIT",
             If(timer == 0,
                 NextValue(timer, sample_cyc - width - 1),
-                NextState("READ-1")
+                NextState("CHANNEL-0-READ-1")
             ).Else(
                 NextValue(timer, timer - 1)
             )
         )
-        self.fsm.act("READ-1",
-            out_fifo.re.eq(1),
-            If(out_fifo.readable,
-                NextValue(level[0:8], out_fifo.dout),
-                NextState("WAIT" if width == 1 else "READ-2")
-            ).Else(
-                NextState("STANDBY")
-            )
-        )
-        if width > 1:
-            self.fsm.act("READ-2",
-                out_fifo.re.eq(1),
-                If(out_fifo.readable,
-                    NextValue(level[8:16], out_fifo.dout),
-                    NextState("WAIT")
-                ).Else(
-                    NextState("STANDBY")
+        for index, channel in enumerate(channels):
+            if index + 1 < len(channels):
+                next_state = "CHANNEL-%d-READ-1" % (index + 1)
+            else:
+                next_state = "LATCH"
+            if width == 1:
+                self.fsm.act("CHANNEL-%d-READ-1" % index,
+                    out_fifo.re.eq(1),
+                    If(out_fifo.readable,
+                        NextValue(channel.level[0:8], out_fifo.dout),
+                        NextState(next_state)
+                    ).Else(
+                        NextState("STANDBY")
+                    )
                 )
-            )
+            if width == 2:
+                self.fsm.act("CHANNEL-%d-READ-1" % index,
+                    out_fifo.re.eq(1),
+                    If(out_fifo.readable,
+                        NextValue(channel.level[0:8], out_fifo.dout),
+                        NextState("CHANNEL-%d-READ-2" % index)
+                    ).Else(
+                        NextState("STANDBY")
+                    )
+                )
+                self.fsm.act("CHANNEL-%d-READ-2" % index,
+                    out_fifo.re.eq(1),
+                    If(out_fifo.readable,
+                        NextValue(channel.level[8:16], out_fifo.dout),
+                        NextState(next_state)
+                    ).Else(
+                        NextState("STANDBY")
+                    )
+                )
+        self.fsm.act("LATCH",
+            [channel.stb.eq(1) for channel in channels],
+            NextState("WAIT")
+        )
 
 
 class AudioOutputApplet(GlasgowApplet, name="audio-output"):
@@ -60,21 +92,26 @@ class AudioOutputApplet(GlasgowApplet, name="audio-output"):
     Play sound using a 1-bit sigma-delta DAC, i.e. pulse density modulation.
 
     Currently, the supported sample formats are:
-        * mono unsigned 8-bit,
-        * mono unsigned 16-bit little endian.
+        * 1..16 channel unsigned 8-bit,
+        * 1..16 channel unsigned 16-bit little endian.
 
     Other formats may be converted to it using:
 
-        sox <input> -c 1 -r <rate> <output>.<u8|u16>
+        sox <input> -c <channels> -r <rate> <output>.<u8|u16>
+
+    For example, to play an ogg file:
+
+        sox samples.ogg -c 2 -r 48000 samples.u16
+        glasgow run audio-output --pins-o 0,1 -r 48000 -w 2 samples.u16
     """
 
-    __pins = ("o",)
+    __pin_sets = ("o",)
 
     @classmethod
     def add_build_arguments(cls, parser, access):
         super().add_build_arguments(parser, access)
 
-        access.add_pin_argument(parser, "o", default=True)
+        access.add_pin_set_argument(parser, "o", width=range(1, 17), default=True)
 
         parser.add_argument(
             "-r", "--sample-rate", metavar="FREQ", type=int, default=8000,
@@ -86,7 +123,7 @@ def add_build_arguments(cls, parser, access):
     def build(self, target, args):
         self.mux_interface = iface = target.multiplexer.claim_interface(self, args)
         subtarget = iface.add_subtarget(AudioOutputSubtarget(
-            pads=iface.get_pads(args, pins=self.__pins),
+            pads=iface.get_pads(args, pin_sets=self.__pin_sets),
             out_fifo=iface.get_out_fifo(),
             sample_cyc=int(target.sys_clk_freq // args.sample_rate),
             width=args.width,