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base repository: whitequark/Boneless-CPU
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head repository: whitequark/Boneless-CPU
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compare: f4c05045b609
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  • 2 commits
  • 5 files changed
  • 1 contributor

Commits on Dec 24, 2018

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    14d9d10 View commit details
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    f4c0504 View commit details
Showing with 59 additions and 41 deletions.
  1. +40 −40 boneless/disasm.py
  2. +3 −1 boneless/gateware/core_fsm.py
  3. +3 −0 examples/.gitignore
  4. +5 −0 examples/iceblink.pcf
  5. +8 −0 examples/run.sh
80 changes: 40 additions & 40 deletions boneless/disasm.py
Original file line number Diff line number Diff line change
@@ -16,9 +16,9 @@ def bits(word, start, end=None, sign=False):

def disassemble(insn, python=False):
if python:
l, r = "()"
l, r = "(", ")"
else:
l = r = ""
l, r = " ", ""

i_class = bits(insn, 12, 16)
i_code1 = bits(insn, 11, 12)
@@ -40,86 +40,86 @@ def disassemble(insn, python=False):
i_cond = bits(insn, 12, 15)

if insn == 0x0000:
return "NOP {}{}".format(l, r)
return "NOP {}{}".format(l, r)

if i_code5 == OPCODE_LOGIC:
if i_type2 == OPTYPE_AND:
return "AND {}R{}, R{}, R{}{}".format(l, i_regZ, i_regY, i_regX, r)
return "AND {}R{}, R{}, R{}{}".format(l, i_regZ, i_regY, i_regX, r)
if i_type2 == OPTYPE_OR:
return "OR {}R{}, R{}, R{}{}".format(l, i_regZ, i_regY, i_regX, r)
return "OR {}R{}, R{}, R{}{}".format(l, i_regZ, i_regY, i_regX, r)
if i_type2 == OPTYPE_XOR:
return "XOR {}R{}, R{}, R{}{}".format(l, i_regZ, i_regY, i_regX, r)
return "XOR {}R{}, R{}, R{}{}".format(l, i_regZ, i_regY, i_regX, r)
if i_code5 == OPCODE_ARITH:
if i_type2 == OPTYPE_ADD:
return "ADD {}R{}, R{}, R{}{}".format(l, i_regZ, i_regY, i_regX, r)
return "ADD {}R{}, R{}, R{}{}".format(l, i_regZ, i_regY, i_regX, r)
if i_type2 == OPTYPE_SUB:
return "SUB {}R{}, R{}, R{}{}".format(l, i_regZ, i_regY, i_regX, r)
return "SUB {}R{}, R{}, R{}{}".format(l, i_regZ, i_regY, i_regX, r)
if i_type2 == OPTYPE_CMP:
return "CMP {}R{}, R{}{}".format(l, i_regY, i_regX, r)
return "CMP {}R{}, R{}{}".format(l, i_regY, i_regX, r)
if i_code5 == OPCODE_SHIFT_L:
if i_type1 == OPTYPE_SLL:
return "SLL {}R{}, R{}, {}{}".format(l, i_regZ, i_regY, i_shift, r)
return "SLL {}R{}, R{}, {}{}".format(l, i_regZ, i_regY, i_shift, r)
if i_type1 == OPTYPE_ROT:
return "ROT {}R{}, R{}, {}{}".format(l, i_regZ, i_regY, i_shift, r)
return "ROT {}R{}, R{}, {}{}".format(l, i_regZ, i_regY, i_shift, r)
if i_code5 == OPCODE_SHIFT_R:
if i_type1 == OPTYPE_SRL:
return "SRL {}R{}, R{}, {}{}".format(l, i_regZ, i_regY, i_shift, r)
return "SRL {}R{}, R{}, {}{}".format(l, i_regZ, i_regY, i_shift, r)
if i_type1 == OPTYPE_SRA:
return "SRA {}R{}, R{}, {}{}".format(l, i_regZ, i_regY, i_shift, r)
return "SRA {}R{}, R{}, {}{}".format(l, i_regZ, i_regY, i_shift, r)
if i_code5 == OPCODE_LD:
return "LD {}R{}, R{}, {:+}{}".format(l, i_regZ, i_regY, i_imm5, r)
return "LD {}R{}, R{}, {:+}{}".format(l, i_regZ, i_regY, i_imm5, r)
if i_code5 == OPCODE_ST:
return "ST {}R{}, R{}, {:+}{}".format(l, i_regZ, i_regY, i_imm5, r)
return "ST {}R{}, R{}, {:+}{}".format(l, i_regZ, i_regY, i_imm5, r)
if i_code5 == OPCODE_LDX:
return "LDX {}R{}, R{}, {:+}{}".format(l, i_regZ, i_regY, i_imm5, r)
return "LDX {}R{}, R{}, {:+}{}".format(l, i_regZ, i_regY, i_imm5, r)
if i_code5 == OPCODE_STX:
return "STX {}R{}, R{}, {:+}{}".format(l, i_regZ, i_regY, i_imm5, r)
return "STX {}R{}, R{}, {:+}{}".format(l, i_regZ, i_regY, i_imm5, r)
if i_code5 == OPCODE_MOVL:
return "MOVL {}R{}, {}{}".format(l, i_regZ, i_imm8 & 0xff, r)
return "MOVL{}R{}, {}{}".format(l, i_regZ, i_imm8 & 0xff, r)
if i_code5 == OPCODE_MOVH:
return "MOVH {}R{}, {}{}".format(l, i_regZ, i_imm8 & 0xff, r)
return "MOVH{}R{}, {}{}".format(l, i_regZ, i_imm8 & 0xff, r)
if i_code5 == OPCODE_MOVA:
return "MOVA {}R{}, {:+}{}".format(l, i_regZ, i_imm8, r)
return "MOVA{}R{}, {:+}{}".format(l, i_regZ, i_imm8, r)
if i_code5 == OPCODE_ADDI:
return "ADDI {}R{}, {}{}".format(l, i_regZ, i_imm8, r)
return "ADDI{}R{}, {}{}".format(l, i_regZ, i_imm8, r)
if i_code5 == OPCODE_LDI:
return "LDI {}R{}, {:+}{}".format(l, i_regZ, i_imm8, r)
return "LDI {}R{}, {:+}{}".format(l, i_regZ, i_imm8, r)
if i_code5 == OPCODE_STI:
return "STI {}R{}, {:+}{}".format(l, i_regZ, i_imm8, r)
return "STI {}R{}, {:+}{}".format(l, i_regZ, i_imm8, r)
if i_code5 == OPCODE_JAL:
return "JAL {}R{}, {:+}{}".format(l, i_regZ, i_imm8, r)
return "JAL {}R{}, {:+}{}".format(l, i_regZ, i_imm8, r)
if i_code5 == OPCODE_JR:
return "JR {}R{}, {:+}{}".format(l, i_regZ, i_imm8, r)
return "JR {}R{}, {:+}{}".format(l, i_regZ, i_imm8, r)
if i_code5 == OPCODE_J:
return "J {}{:+}{}".format(l, i_imm11, r)
return "J {}{:+}{}".format(l, i_imm11, r)
if i_code5 == OPCODE_JNZ:
return "JNZ {}{:+}{}".format(l, i_imm11, r)
return "JNZ {}{:+}{}".format(l, i_imm11, r)
if i_code5 == OPCODE_JZ:
return "JZ {}{:+}{}".format(l, i_imm11, r)
return "JZ {}{:+}{}".format(l, i_imm11, r)
if i_code5 == OPCODE_JNS:
return "JNS {}{:+}{}".format(l, i_imm11, r)
return "JNS {}{:+}{}".format(l, i_imm11, r)
if i_code5 == OPCODE_JS:
return "JS {}{:+}{}".format(l, i_imm11, r)
return "JS {}{:+}{}".format(l, i_imm11, r)
if i_code5 == OPCODE_JNO:
return "JNO {}{:+}{}".format(l, i_imm11, r)
return "JNO {}{:+}{}".format(l, i_imm11, r)
if i_code5 == OPCODE_JO:
return "JO {}{:+}{}".format(l, i_imm11, r)
return "JO {}{:+}{}".format(l, i_imm11, r)
if i_code5 == OPCODE_JULT:
return "JULT {}{:+}{}".format(l, i_imm11, r)
return "JULT{}{:+}{}".format(l, i_imm11, r)
if i_code5 == OPCODE_JUGE:
return "JUGE {}{:+}{}".format(l, i_imm11, r)
return "JUGE{}{:+}{}".format(l, i_imm11, r)
if i_code5 == OPCODE_JUGT:
return "JUGT {}{:+}{}".format(l, i_imm11, r)
return "JUGT{}{:+}{}".format(l, i_imm11, r)
if i_code5 == OPCODE_JULE:
return "JULE {}{:+}{}".format(l, i_imm11, r)
return "JULE{}{:+}{}".format(l, i_imm11, r)
if i_code5 == OPCODE_JSGE:
return "JSGE {}{:+}{}".format(l, i_imm11, r)
return "JSGE{}{:+}{}".format(l, i_imm11, r)
if i_code5 == OPCODE_JSLT:
return "JSLT {}{:+}{}".format(l, i_imm11, r)
return "JSLT{}{:+}{}".format(l, i_imm11, r)
if i_code5 == OPCODE_JSGT:
return "JSGT {}{:+}{}".format(l, i_imm11, r)
return "JSGT{}{:+}{}".format(l, i_imm11, r)
if i_code5 == OPCODE_JSLE:
return "JSLE {}{:+}{}".format(l, i_imm11, r)
return "JSLE{}{:+}{}".format(l, i_imm11, r)

return "ILL {}0x{:04x}{}".format(l, insn, r)

4 changes: 3 additions & 1 deletion boneless/gateware/core_fsm.py
Original file line number Diff line number Diff line change
@@ -435,11 +435,13 @@ def __init__(self, has_pins=False):
self.mem.init = [
0, 0, 0, 0, 0, 0, 0, 0,
*assemble([
NOP (),
NOP (),
MOVL(R1, 1),
"loop",
STX (R1, R0, 0),
ROT (R1, R1, 1),
MOVH(R2, 1),
MOVH(R2, 80),
"delay",
SUBI(R2, 1),
JNZ ("delay"),
3 changes: 3 additions & 0 deletions examples/.gitignore
Original file line number Diff line number Diff line change
@@ -0,0 +1,3 @@
*.json
*.txt
*.bin
5 changes: 5 additions & 0 deletions examples/iceblink.pcf
Original file line number Diff line number Diff line change
@@ -0,0 +1,5 @@
set_io clk 13
set_io led[0] 59
set_io led[1] 56
set_io led[2] 53
set_io led[3] 51
8 changes: 8 additions & 0 deletions examples/run.sh
Original file line number Diff line number Diff line change
@@ -0,0 +1,8 @@
#!/bin/sh -ex

cd $(dirname $0)
python3 -W ignore -m boneless.gateware.core_fsm pins generate fsm_core_pins.v
yosys fsm_core_pins.v iceblink.v -p "synth_ice40 -top top -json iceblink.json"
nextpnr-ice40 --hx1k --package vq100 --pcf iceblink.pcf --json iceblink.json --asc iceblink.txt
icepack iceblink.txt iceblink.bin
iCEburn -e -w iceblink.bin