Updated user guide introduction for nmigen. #22
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doc/introduction.rst
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| #. different design strategies for ASICs versus FPGAs | ||
| #. and more... | ||
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| A little-known fact about FPGAs is that many of them have the ability to initialize their registers from the bitstream contents. This can be done in a portable and standard way using an "initial" block in Verilog, and by affecting a value at the signal declaration in VHDL. This renders an explicit reset signal unnecessary in practice in some cases, which opens the way for further design optimization. However, this form of initialization is entirely not synthesizable for ASIC targets, and it is not easy to switch between the two forms of reset using V*HDL. |
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There is no "ASIC mode" in nMigen.
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As in, nMigen does not offer the option to switch between the two options either. (It may in the future, but doesn't now.) So this sentence should be removed.
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How should I resolve this copy then? I interpret this paragraph not as there being specific ASIC modalities or explicit ASIC support, but rather, "This is a problem contributing to why we wrote nmigen."
Alternatively, I can remove this paragraph all together.
The following sections have been amended and now reflect proper nMigen behavior: * Constants * Signals * Operations * Slices * Catenations * Replications
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Howdy! Following these commands will correctly install the package:
This ensures that all packages can be found by the installer as pulling the repository and attempting to run the setup.py locally using python3 will result in missing packages (notably Python.h) I was installing nmigen today and may have pulled out a hair or two and just wanted to make everyone's life a little easier! |
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Thank you for the feedback. I'd missed this. I'll probably be able to commit your recommended changes in a day or two, unless by some miracle I find the free time later tonight. :) |
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I decided to make the change without mentioning Ubuntu or Debian specifically. Not all Linux distributions use a distinct pip3 executable (I use Void Linux, for instance, and at least within a virtualenv configured to use Python 3, pip and pip3 are identical executables). I'll be pushing the change shortly. Apologies for the long latency; the start-up that I work for has had me well and truly burnt out for a while. |
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@sam-falvo It should not be possible to install nMigen on unsupported Python versions anyway, should be constrained using [1] https://packaging.python.org/guides/distributing-packages-using-setuptools/#python-requires |
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Wouldn't >=3.6 be preferred?
…On Thu, Feb 21, 2019 at 8:45 AM Alain Péteut ***@***.***> wrote:
@sam-falvo <https://github.com/sam-falvo> It should not be possible to
install *nMigen* on unsupported Python versions anyway, should be
constrained using python_requires = ~=3.6,~=3.7.
[1]
https://packaging.python.org/guides/distributing-packages-using-setuptools/#python-requires
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Indeed, |
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| A HDL module is a Python object that derives from the ``Module`` class. Module objects have a series of methods, described below, which describes the behavioral characteristics of the module. In addition to these behavioral methods, the HDL module object also possesses attributes which are used to help construct combinatorial and synchronous logic as well. | ||
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| In essence, a fresh ``Module`` object a blank slate which, by way of various HDL methods described below, is populated with a description of the hardware module you want to synthesize or simulate. |
| self.s = Signal(max=3) | ||
| self.y = Signal() | ||
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| def get_fragment(self, platform): |
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Is there any reason this isn't merged (yet) ? Are there plain wrong statements in there, or is it a good start, and other could step in and improve the doc incrementally ? |
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Some time ago, I received the following from Whitequark:
Looks like @whitequark forgot about this PR when she closed the other one. I'll close this PR, as the manual I was working on is no longer relevant. |
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Thanks for the info. It’s pretty unfortunate that this merge-request did show off before other stuff when googling for the possibility to nest if statements. Is the actual doc linked somewhere? |
The goal is to work through each section, one by one, receiving documentation reviews along the way. The introduction is a good first step. Feedback appreciated!