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Feature: Add use of Intel Intrinsics & RDTSC on e2k (MCST Elbrus 2000) #9575

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merged 1 commit into from Sep 26, 2021
Merged

Feature: Add use of Intel Intrinsics & RDTSC on e2k (MCST Elbrus 2000) #9575

merged 1 commit into from Sep 26, 2021

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r-a-sattarov
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Motivation / Problem

The e2k MCST-LСС (eLbrus Compiler Collection) compiler can cross-compile Intel Intrinsics into Elbrus Intrinsics. But to use this feature need to pretend to be an i386/x86_64 architecture (to use this code). To do this need to add Elbrus implementation to CPUID function.
Also, Elbrus support RDTSC.

Description

Added use of Intel Intrinsics (SSE2, SSSE3, SSE4.1) & RDTSC on e2k architecture by default.
Co-authored-by: Alexander Troosh @troosh, Konstantin Ivlev @SSE4 and Dmitry Shcherbakov @crypto-das

Limitations

No.

Checklist for review

Some things are not automated, and forgotten often. This list is a reminder for the reviewers.

  • The bug fix is important enough to be backported? (label: 'backport requested')
  • This PR touches english.txt or translations? Check the guidelines
  • This PR affects the save game format? (label 'savegame upgrade')
  • This PR affects the GS/AI API? (label 'needs review: Script API')
    * ai_changelog.hpp, gs_changelog.hpp need updating.
    * The compatibility wrappers (compat_*.nut) need updating.
  • This PR affects the NewGRF API? (label 'needs review: NewGRF')

MCST e2k (Elbrus 2000) architecture has half native / half software support of most Intel/AMD SIMD
e.g. MMX/SSE/SSE2/SSE3/SSSE3/SSE4.1/SSE4.2/AES/AVX/AVX2 & 3DNow!/SSE4a/XOP/FMA4

E2K - this is VLIW/EPIC architecture, like Intel Itanium (IA-64) architecture.
Ref: https://en.wikipedia.org/wiki/Elbrus_2000

Co-authored-by: Alexander Troosh @troosh, Konstantin Ivlev @SSE4 and Dmitry Shcherbakov @crypto-das
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@LordAro LordAro left a comment

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I had literally never heard of this architecture before. But sure, why not! I'm curious what sort of performance you get with it (with and without sse/rdtsc)

I think we can probably manage to sneak this into 12.0 as well

@TrueBrain TrueBrain merged commit 14ad424 into OpenTTD:master Sep 26, 2021
@TrueBrain TrueBrain added the backport requested This PR should be backport to current release (RC / stable) label Sep 26, 2021
@r-a-sattarov r-a-sattarov deleted the use-of-sse-and-rdtsc-on-e2k branch September 26, 2021 17:33
TrueBrain pushed a commit to TrueBrain/OpenTTD that referenced this pull request Oct 3, 2021
…TD#9575)

MCST e2k (Elbrus 2000) architecture has half native / half software support of most Intel/AMD SIMD
e.g. MMX/SSE/SSE2/SSE3/SSSE3/SSE4.1/SSE4.2/AES/AVX/AVX2 & 3DNow!/SSE4a/XOP/FMA4

E2K - this is VLIW/EPIC architecture, like Intel Itanium (IA-64) architecture.
Ref: https://en.wikipedia.org/wiki/Elbrus_2000

Co-authored-by: Alexander Troosh @troosh, Konstantin Ivlev @SSE4 and Dmitry Shcherbakov @crypto-das
TrueBrain pushed a commit to TrueBrain/OpenTTD that referenced this pull request Oct 3, 2021
…TD#9575)

MCST e2k (Elbrus 2000) architecture has half native / half software support of most Intel/AMD SIMD
e.g. MMX/SSE/SSE2/SSE3/SSSE3/SSE4.1/SSE4.2/AES/AVX/AVX2 & 3DNow!/SSE4a/XOP/FMA4

E2K - this is VLIW/EPIC architecture, like Intel Itanium (IA-64) architecture.
Ref: https://en.wikipedia.org/wiki/Elbrus_2000

Co-authored-by: Alexander Troosh @troosh, Konstantin Ivlev @SSE4 and Dmitry Shcherbakov @crypto-das
TrueBrain pushed a commit to TrueBrain/OpenTTD that referenced this pull request Oct 3, 2021
…TD#9575)

MCST e2k (Elbrus 2000) architecture has half native / half software support of most Intel/AMD SIMD
e.g. MMX/SSE/SSE2/SSE3/SSSE3/SSE4.1/SSE4.2/AES/AVX/AVX2 & 3DNow!/SSE4a/XOP/FMA4

E2K - this is VLIW/EPIC architecture, like Intel Itanium (IA-64) architecture.
Ref: https://en.wikipedia.org/wiki/Elbrus_2000

Co-authored-by: Alexander Troosh @troosh, Konstantin Ivlev @SSE4 and Dmitry Shcherbakov @crypto-das
TrueBrain pushed a commit to TrueBrain/OpenTTD that referenced this pull request Oct 3, 2021
…TD#9575)

MCST e2k (Elbrus 2000) architecture has half native / half software support of most Intel/AMD SIMD
e.g. MMX/SSE/SSE2/SSE3/SSSE3/SSE4.1/SSE4.2/AES/AVX/AVX2 & 3DNow!/SSE4a/XOP/FMA4

E2K - this is VLIW/EPIC architecture, like Intel Itanium (IA-64) architecture.
Ref: https://en.wikipedia.org/wiki/Elbrus_2000

Co-authored-by: Alexander Troosh @troosh, Konstantin Ivlev @SSE4 and Dmitry Shcherbakov @crypto-das
TrueBrain pushed a commit to TrueBrain/OpenTTD that referenced this pull request Oct 3, 2021
…TD#9575)

MCST e2k (Elbrus 2000) architecture has half native / half software support of most Intel/AMD SIMD
e.g. MMX/SSE/SSE2/SSE3/SSSE3/SSE4.1/SSE4.2/AES/AVX/AVX2 & 3DNow!/SSE4a/XOP/FMA4

E2K - this is VLIW/EPIC architecture, like Intel Itanium (IA-64) architecture.
Ref: https://en.wikipedia.org/wiki/Elbrus_2000

Co-authored-by: Alexander Troosh @troosh, Konstantin Ivlev @SSE4 and Dmitry Shcherbakov @crypto-das
TrueBrain pushed a commit that referenced this pull request Oct 3, 2021
MCST e2k (Elbrus 2000) architecture has half native / half software support of most Intel/AMD SIMD
e.g. MMX/SSE/SSE2/SSE3/SSSE3/SSE4.1/SSE4.2/AES/AVX/AVX2 & 3DNow!/SSE4a/XOP/FMA4

E2K - this is VLIW/EPIC architecture, like Intel Itanium (IA-64) architecture.
Ref: https://en.wikipedia.org/wiki/Elbrus_2000

Co-authored-by: Alexander Troosh @troosh, Konstantin Ivlev @SSE4 and Dmitry Shcherbakov @crypto-das
@TrueBrain TrueBrain removed the backport requested This PR should be backport to current release (RC / stable) label Oct 3, 2021
@LordAro LordAro added the backported This PR is backported to a current release (RC / stable) label Oct 23, 2022
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3 participants