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The 128-bit and 256-bit LUT-RAM vendor tests are disabled (see #1268). These are likely caused by bugs in how fasm2bels emits these structures. Likely path forward is to have fasm2bels emit RAM64M + F7/F8 muxes rather than 2x RAM128X1S/RAM128X1D/RAM256X1S structures when all 4 LUT-RAM's are present in a SLICEM.
The 128-bit and 256-bit LUT-RAM vendor tests are disabled (see #1268). These are likely caused by bugs in how fasm2bels emits these structures. Likely path forward is to have fasm2bels emit RAM64M + F7/F8 muxes rather than 2x RAM128X1S/RAM128X1D/RAM256X1S structures when all 4 LUT-RAM's are present in a SLICEM.
This issue is a split from #1269
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