Comment by whitequark
Thursday Jan 09, 2020 at 09:56 GMT

Can you explain what does the filter expression in your commit does?

Comment by peteut
Thursday Jan 09, 2020 at 11:29 GMT

@whitequark this is indeed ugly and should be fixed, it's purpose is to filter negative ports of differential clock inputs, ending with __n. So it matches ports ending with __p or __io. Internal clocks are matched using ^.+/.+$, for signals like my_module/clk_out.

Comment by whitequark
Thursday Jan 09, 2020 at 11:39 GMT

You did explain why it's ugly, which is helpful (thanks!). Unfortunately, you didn't explain what it does, so I can't help you work out a nicer replacement. I don't have the Xilinx flavor of Tcl API memorized.

Comment by peteut
Thursday Jan 09, 2020 at 12:44 GMT

Here's an excerpt from UG906 explaining the TIMING-2 warning and how to use create_clock correctly:

The Tcl fragment does exactly that, it starts from the clock signal and determines it's startpoint using all_fanin -flat -startpoints_only. The returned could contains my-signal__p my-signal__n, therefore filter -regexp filters my-signal__n, so only a single item remain.

[filter -regexp [all_fanin -flat -startpoints_only \
                    [get_nets {{signal|hierarchy("/")}}]] {NAME =~{(^.*__p$)|(^.*__io$)|(^.+/.+$)}}]

Vivado Tcl reference is available here: Tcl Command Reference Guide, UG835.

@peteut Thank you for bringing this to my attention; I did not realize that the exact placement of the constraint is semantically important. I've added report_methodology to the Vivado scripts, and I've changed the core APIs so that the constraint can be appropriately placed without any ugliness.

@peteut Thank you for bringing this to my attention; I did not realize that the exact placement of the constraint is semantically important. I've added report_methodology to the Vivado scripts, and I've changed the core APIs so that the constraint can be appropriately placed without any ugliness.

@whitequark Thanks, much nicer indeed!