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Description
Brief explanation
Render FPGA LUTs as a digital circuit diagram.
Detailed Explanation
FPGA devices use look-up table (LUT) to implement arbitrary combinatorial logic.
for N
bit LUT configuration can be represented as an 2^N
long number.
Most typical LUTs are LUT4 with N = 4
with 2^N = 16
bit config word shown on the figure below.
Mux representation of LUT is not the most human-readable one.
Any configuration of the LUT can be rendered as a digital circuit diagram.
https://github.com/drom/icedrom -- is an JavaScript libratry that can render LUT config as digital circuit diagram.
Read more HERE https://observablehq.com/@drom/lut4-decoder
Activity
[-]render LUT diagram[/-][+]Render LUT diagram[/+]mithro commentedon Mar 18, 2020
This would be excellent to be part of a sphinx extension - potentially http://sphinxcontrib-verilog-diagrams.rtfd.io/ too