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base repository: azonenberg/starshipraider
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compare: f7cc4dcf14f4
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  • 1 commit
  • 10 files changed
  • 1 contributor

Commits on Mar 28, 2020

  1. Continued schematic review. Done with everything but test point/groun… 

    …d insertion.
    @azonenberg
    azonenberg committed Mar 28, 2020
    Copy the full SHA
    f7cc4dc View commit details
38 changes: 37 additions & 1 deletion boards/entry-afe-characterization/cm_shift.sch
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Original file line number Diff line number Diff line change
@@ -6,7 +6,7 @@ $Descr A4 11693 8268
encoding utf-8
Sheet 5 8
Title "Entry-Level Oscilloscope AFE Characterization Platform"
Date "2020-03-27"
Date "2020-03-28"
Rev "0.1"
Comp "Antikernel Labs"
Comment1 ""
@@ -326,4 +326,40 @@ Wire Wire Line
Connection ~ 5700 3150
Wire Wire Line
5700 3150 5900 3150
$Comp
L device:C C?
U 1 1 5EAA7EB6
P 6400 1350
AR Path="/5E73DF00/5EAA7EB6" Ref="C?" Part="1"
AR Path="/5E75B917/5EAA7EB6" Ref="C71" Part="1"
F 0 "C71" H 6515 1396 50 0000 L CNN
F 1 "4.7 uF" H 6515 1305 50 0000 L CNN
F 2 "azonenberg_pcb:EIA_0805_CAP_NOSILK" H 6438 1200 50 0001 C CNN
F 3 "" H 6400 1350 50 0001 C CNN
1 6400 1350
1 0 0 -1
$EndComp
Wire Wire Line
5600 1500 6400 1500
Connection ~ 5600 1500
Text Label 6400 1200 2 50 ~ 0
5V0_P
$Comp
L device:C C?
U 1 1 5EAA8E3D
P 7000 1350
AR Path="/5E73DF00/5EAA8E3D" Ref="C?" Part="1"
AR Path="/5E75B917/5EAA8E3D" Ref="C72" Part="1"
F 0 "C72" H 7115 1396 50 0000 L CNN
F 1 "4.7 uF" H 7115 1305 50 0000 L CNN
F 2 "azonenberg_pcb:EIA_0805_CAP_NOSILK" H 7038 1200 50 0001 C CNN
F 3 "" H 7000 1350 50 0001 C CNN
1 7000 1350
1 0 0 -1
$EndComp
Text Label 7000 1200 2 50 ~ 0
5V0_N
Wire Wire Line
7000 1500 6400 1500
Connection ~ 6400 1500
$EndSCHEMATC
2 changes: 1 addition & 1 deletion boards/entry-afe-characterization/dac.sch
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Original file line number Diff line number Diff line change
@@ -6,7 +6,7 @@ $Descr A4 11693 8268
encoding utf-8
Sheet 7 8
Title "Entry-Level Oscilloscope AFE Characterization Platform"
Date "2020-03-27"
Date "2020-03-28"
Rev "0.1"
Comp "Antikernel Labs"
Comment1 ""
21 changes: 21 additions & 0 deletions boards/entry-afe-characterization/entry-afe-characterization-cache.lib
View file
Original file line number Diff line number Diff line change
@@ -438,6 +438,27 @@ X 2 2 0 -150 50 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# device_LED
#
DEF device_LED D 0 40 Y N 1 F N
F0 "D" 0 100 50 H V C CNN
F1 "device_LED" 0 -100 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
LED*
$ENDFPLIST
DRAW
P 2 0 1 8 -50 -50 -50 50 N
P 2 0 1 0 -50 0 50 0 N
P 4 0 1 8 50 -50 50 50 -50 0 50 -50 N
P 5 0 1 0 -120 -30 -180 -90 -150 -90 -180 -90 -180 -60 N
P 5 0 1 0 -70 -30 -130 -90 -100 -90 -130 -90 -130 -60 N
X K 1 -150 0 100 R 50 50 1 1 P
X A 2 150 0 100 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# device_Q_PNP_BCEC
#
DEF device_Q_PNP_BCEC Q 0 0 Y N 1 F N
6 changes: 3 additions & 3 deletions boards/entry-afe-characterization/entry-afe-characterization.sch
View file
Original file line number Diff line number Diff line change
@@ -6,7 +6,7 @@ $Descr A4 11693 8268
encoding utf-8
Sheet 1 8
Title "Entry-Level Oscilloscope AFE Characterization Platform"
Date "2020-03-27"
Date "2020-03-28"
Rev "0.1"
Comp "Antikernel Labs"
Comment1 "Top Level"
@@ -34,8 +34,8 @@ F11 "DAC_CS_N" O L 4150 6750 50
F12 "DAC_LDAC" O L 4150 6850 50
F13 "DAC_RST_N" O L 4150 6950 50
F14 "RELAY_EN" O R 5750 5950 50
F15 "OVERVOLTAGE_N" I R 5750 6050 50
F16 "INPUT_RST" O R 5750 6150 50
F15 "INPUT_RST" O R 5750 6150 50
F16 "OVERVOLTAGE_N" B R 5750 6050 50
$EndSheet
$Sheet
S 1150 650 1100 1600
6 changes: 3 additions & 3 deletions boards/entry-afe-characterization/gainstage.sch
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Original file line number Diff line number Diff line change
@@ -6,7 +6,7 @@ $Descr A4 11693 8268
encoding utf-8
Sheet 6 8
Title "Entry-Level Oscilloscope AFE Characterization Platform"
Date "2020-03-27"
Date "2020-03-28"
Rev "0.1"
Comp "Antikernel Labs"
Comment1 ""
@@ -408,8 +408,8 @@ Text HLabel 4300 4500 2 50 Input ~ 0
SPI_SCLK
Wire Wire Line
4300 4500 4050 4500
Text Notes 4300 4700 0 50 ~ 0
SPI interface runs at 5V levels
Text Notes 2800 5850 0 50 ~ 0
SPI interface runs at 5V levels from U2 to MCU\nMCU to U2 runs at 3.3V\nADL5205 Vih is 2V so no level shift needed
Text HLabel 4300 4000 2 50 Input ~ 0
VGA_PERF_MODE
Wire Wire Line
2 changes: 1 addition & 1 deletion boards/entry-afe-characterization/input.sch
View file
Original file line number Diff line number Diff line change
@@ -6,7 +6,7 @@ $Descr A4 11693 8268
encoding utf-8
Sheet 3 8
Title "Entry-Level Oscilloscope AFE Characterization Platform"
Date "2020-03-27"
Date "2020-03-28"
Rev "0.1"
Comp "Antikernel Labs"
Comment1 ""
104 changes: 99 additions & 5 deletions boards/entry-afe-characterization/mcu.sch
View file
Original file line number Diff line number Diff line change
@@ -6,7 +6,7 @@ $Descr A4 11693 8268
encoding utf-8
Sheet 2 8
Title "Entry-Level Oscilloscope AFE Characterization Platform"
Date "2020-03-27"
Date "2020-03-28"
Rev "0.1"
Comp "Antikernel Labs"
Comment1 ""
@@ -182,11 +182,8 @@ Text Label 5300 3900 2 50 ~ 0
UART_TX
Text Label 5300 4000 2 50 ~ 0
UART_RX
NoConn ~ 5300 3600
NoConn ~ 5300 3500
Wire Wire Line
6850 3300 6850 3400
NoConn ~ 6850 3600
NoConn ~ 3500 3700
NoConn ~ 3500 3800
Text HLabel 5300 3300 0 50 Output ~ 0
@@ -209,7 +206,7 @@ $EndComp
Connection ~ 2450 2750
Text HLabel 5300 3800 0 50 Output ~ 0
RELAY_EN
Text HLabel 6850 3500 0 50 Input ~ 0
Text HLabel 6850 3500 0 50 BiDi ~ 0
OVERVOLTAGE_N
Text HLabel 6850 3000 0 50 Output ~ 0
INPUT_RST
@@ -224,4 +221,101 @@ F 3 "" H 6950 3650 50 0001 C CNN
3 6950 3650
1 0 0 -1
$EndComp
Text Label 6850 3600 2 50 ~ 0
LED0
Text Label 7100 1400 2 50 ~ 0
LED0
Text Label 5300 3500 2 50 ~ 0
LED1
Text Label 5300 3600 2 50 ~ 0
LED2
$Comp
L device:R R65
U 1 1 5EAAECD4
P 7350 1400
F 0 "R65" V 7300 1250 50 0000 C CNN
F 1 "470" V 7350 1400 50 0000 C CNN
F 2 "azonenberg_pcb:EIA_0402_RES_NOSILK" V 7280 1400 50 0001 C CNN
F 3 "" H 7350 1400 50 0001 C CNN
1 7350 1400
0 1 1 0
$EndComp
Wire Wire Line
7100 1400 7200 1400
$Comp
L device:LED D9
U 1 1 5EAAF8A7
P 7650 1400
F 0 "D9" H 7643 1145 50 0000 C CNN
F 1 "GREEN" H 7643 1236 50 0000 C CNN
F 2 "azonenberg_pcb:EIA_0603_LED" H 7650 1400 50 0001 C CNN
F 3 "~" H 7650 1400 50 0001 C CNN
1 7650 1400
-1 0 0 1
$EndComp
Text Label 7950 1400 0 50 ~ 0
GND
Wire Wire Line
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Text Label 7100 1800 2 50 ~ 0
LED1
$Comp
L device:R R66
U 1 1 5EAB0A48
P 7350 1800
F 0 "R66" V 7300 1650 50 0000 C CNN
F 1 "470" V 7350 1800 50 0000 C CNN
F 2 "azonenberg_pcb:EIA_0402_RES_NOSILK" V 7280 1800 50 0001 C CNN
F 3 "" H 7350 1800 50 0001 C CNN
1 7350 1800
0 1 1 0
$EndComp
Wire Wire Line
7100 1800 7200 1800
$Comp
L device:LED D10
U 1 1 5EAB0A53
P 7650 1800
F 0 "D10" H 7643 1545 50 0000 C CNN
F 1 "GREEN" H 7643 1636 50 0000 C CNN
F 2 "azonenberg_pcb:EIA_0603_LED" H 7650 1800 50 0001 C CNN
F 3 "~" H 7650 1800 50 0001 C CNN
1 7650 1800
-1 0 0 1
$EndComp
Wire Wire Line
7950 1800 7800 1800
Text Label 7100 2200 2 50 ~ 0
LED2
$Comp
L device:R R67
U 1 1 5EAB1BC4
P 7350 2200
F 0 "R67" V 7300 2050 50 0000 C CNN
F 1 "470" V 7350 2200 50 0000 C CNN
F 2 "azonenberg_pcb:EIA_0402_RES_NOSILK" V 7280 2200 50 0001 C CNN
F 3 "" H 7350 2200 50 0001 C CNN
1 7350 2200
0 1 1 0
$EndComp
Wire Wire Line
7100 2200 7200 2200
$Comp
L device:LED D11
U 1 1 5EAB1BCF
P 7650 2200
F 0 "D11" H 7643 1945 50 0000 C CNN
F 1 "GREEN" H 7643 2036 50 0000 C CNN
F 2 "azonenberg_pcb:EIA_0603_LED" H 7650 2200 50 0001 C CNN
F 3 "~" H 7650 2200 50 0001 C CNN
1 7650 2200
-1 0 0 1
$EndComp
Wire Wire Line
7950 2200 7800 2200
Wire Wire Line
7950 1400 7950 1800
Connection ~ 7950 1800
Wire Wire Line
7950 1800 7950 2200
$EndSCHEMATC
66 changes: 33 additions & 33 deletions boards/entry-afe-characterization/offset.sch
View file
Original file line number Diff line number Diff line change
@@ -6,7 +6,7 @@ $Descr A4 11693 8268
encoding utf-8
Sheet 4 8
Title "Entry-Level Oscilloscope AFE Characterization Platform"
Date "2020-03-27"
Date "2020-03-28"
Rev "0.1"
Comp "Antikernel Labs"
Comment1 ""
@@ -137,7 +137,7 @@ Text HLabel 5250 2900 0 50 Input ~ 0
Text HLabel 5250 3000 0 50 Input ~ 0
6V0_N
Wire Wire Line
3700 4950 3200 4950
6200 1650 5700 1650
$Comp
L device:C C15
U 1 1 5E74F9B0
@@ -227,62 +227,62 @@ Wire Wire Line
4150 3500 4500 3500
Text Label 4150 3800 2 50 ~ 0
GND
Text Label 3200 4950 2 50 ~ 0
Text Label 5700 1650 2 50 ~ 0
6V0_N
Text Label 3200 4650 2 50 ~ 0
Text Label 5700 1350 2 50 ~ 0
GND
Text Label 3200 4500 2 50 ~ 0
Text Label 5700 1200 2 50 ~ 0
GND
Text Label 3200 4200 2 50 ~ 0
Text Label 5700 900 2 50 ~ 0
6V0_P
Wire Wire Line
3700 4200 3200 4200
6200 900 5700 900
Wire Wire Line
3200 4500 3700 4500
5700 1200 6200 1200
Wire Wire Line
3200 4650 3700 4650
5700 1350 6200 1350
$Comp
L device:C C12
U 1 1 5E74E22C
P 3200 4800
F 0 "C12" H 3315 4846 50 0000 L CNN
F 1 "4.7 uF" H 3315 4755 50 0000 L CNN
F 2 "azonenberg_pcb:EIA_0805_CAP_NOSILK" H 3238 4650 50 0001 C CNN
F 3 "" H 3200 4800 50 0001 C CNN
1 3200 4800
P 5700 1500
F 0 "C12" H 5815 1546 50 0000 L CNN
F 1 "4.7 uF" H 5815 1455 50 0000 L CNN
F 2 "azonenberg_pcb:EIA_0805_CAP_NOSILK" H 5738 1350 50 0001 C CNN
F 3 "" H 5700 1500 50 0001 C CNN
1 5700 1500
1 0 0 -1
$EndComp
$Comp
L device:C C11
U 1 1 5E74DE4E
P 3200 4350
F 0 "C11" H 3315 4396 50 0000 L CNN
F 1 "4.7 uF" H 3315 4305 50 0000 L CNN
F 2 "azonenberg_pcb:EIA_0805_CAP_NOSILK" H 3238 4200 50 0001 C CNN
F 3 "" H 3200 4350 50 0001 C CNN
1 3200 4350
P 5700 1050
F 0 "C11" H 5815 1096 50 0000 L CNN
F 1 "4.7 uF" H 5815 1005 50 0000 L CNN
F 2 "azonenberg_pcb:EIA_0805_CAP_NOSILK" H 5738 900 50 0001 C CNN
F 3 "" H 5700 1050 50 0001 C CNN
1 5700 1050
1 0 0 -1
$EndComp
$Comp
L device:C C14
U 1 1 5E74D7C6
P 3700 4800
F 0 "C14" H 3815 4846 50 0000 L CNN
F 1 "0.1 uF" H 3815 4755 50 0000 L CNN
F 2 "azonenberg_pcb:EIA_0402_CAP_NOSILK" H 3738 4650 50 0001 C CNN
F 3 "" H 3700 4800 50 0001 C CNN
1 3700 4800
P 6200 1500
F 0 "C14" H 6315 1546 50 0000 L CNN
F 1 "0.1 uF" H 6315 1455 50 0000 L CNN
F 2 "azonenberg_pcb:EIA_0402_CAP_NOSILK" H 6238 1350 50 0001 C CNN
F 3 "" H 6200 1500 50 0001 C CNN
1 6200 1500
1 0 0 -1
$EndComp
$Comp
L device:C C13
U 1 1 5E74C8A0
P 3700 4350
F 0 "C13" H 3815 4396 50 0000 L CNN
F 1 "0.1 uF" H 3815 4305 50 0000 L CNN
F 2 "azonenberg_pcb:EIA_0402_CAP_NOSILK" H 3738 4200 50 0001 C CNN
F 3 "" H 3700 4350 50 0001 C CNN
1 3700 4350
P 6200 1050
F 0 "C13" H 6315 1096 50 0000 L CNN
F 1 "0.1 uF" H 6315 1005 50 0000 L CNN
F 2 "azonenberg_pcb:EIA_0402_CAP_NOSILK" H 6238 900 50 0001 C CNN
F 3 "" H 6200 1050 50 0001 C CNN
1 6200 1050
1 0 0 -1
$EndComp
$Comp
4 changes: 3 additions & 1 deletion boards/entry-afe-characterization/psu.sch
View file
Original file line number Diff line number Diff line change
@@ -6,7 +6,7 @@ $Descr A4 11693 8268
encoding utf-8
Sheet 8 8
Title "Entry-Level Oscilloscope AFE Characterization Platform"
Date "2020-03-27"
Date "2020-03-28"
Rev "0.1"
Comp "Antikernel Labs"
Comment1 ""
@@ -1478,4 +1478,6 @@ F 3 "" H 6600 5300 50 0001 C CNN
1 6600 5300
1 0 0 -1
$EndComp
Text Notes 8000 6350 0 50 ~ 0
U16 is most heavily loaded LDO\nADL5205 with both channels active needs 175 mA\nWe are dropping 2V from 7V0_P = 350 mW\nθJa = 34C/W so expect 11.9C rise\n\nWell within tolerance, so not even bothering to\ndo thermal calculations for the lighter ones.
$EndSCHEMATC
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