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base repository: GlasgowEmbedded/glasgow
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head repository: GlasgowEmbedded/glasgow
compare: 4cc578e0f4cc
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  • 1 commit
  • 2 files changed
  • 1 contributor

Commits on Jan 20, 2021

  1. revC3: add an 4.7µF capacitor to VIO_AUX for improved decoupling 

    VIO_AUX is the IO voltage for the LVDS connector. If it is used with
high speed signals (like for example connecting to fast RAM), the
existing 100n decoupling may not be enough. Also add some more
vias to the VIO_AUX trace for lower inductance.

Unfortunately placing the capacitor nearer to the FPGA would require
major rerouting. This is not done here for fear of adding new issues.
    @electroniceel
    electroniceel committed Jan 20, 2021
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    4cc578e View commit details
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