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PR bitstream size #1490

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fox6666 opened this issue Nov 7, 2020 · 2 comments
Open

PR bitstream size #1490

fox6666 opened this issue Nov 7, 2020 · 2 comments

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@fox6666
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fox6666 commented Nov 7, 2020

Can we estimate the bitstream size from the number of CLB, DSP, and BRAM columns required for a reconfigurable block?

@litghost
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litghost commented Nov 9, 2020

Can we estimate the bitstream size from the number of CLB, DSP, and BRAM columns required for a reconfigurable block?

Such an estimation should be possible, but no one has created a tool. Is this something you would be interested in developing? We can provide guidance on where to start.

@kgugala
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kgugala commented Nov 9, 2020

actually we have some initial support for generating partial bitstreams here https://github.com/antmicro/prjxray/tree/partial-bitstream-support. We'll open a PR to mainline soon

GitHub
Documenting the Xilinx 7-series bit-stream format. - antmicro/prjxray

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