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Add SaxonSoC as a test design #278

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mithro opened this issue Nov 25, 2020 · 0 comments
Open

Add SaxonSoC as a test design #278

mithro opened this issue Nov 25, 2020 · 0 comments

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@mithro
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mithro commented Nov 25, 2020

It would be good to have a SaxonSoC design in FPGA tool perf.

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