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prjxray_create_place_constraints.py fails for unconstrained PLLE2_ADV on xc7a100T device #1542
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Hi @litghost , who is the best person to own this? It involves the constraint solver in the clock placement script. This should be a pretty easy problem to solve, but I can't find anything obvious, such as a hardcoding of clock region X1Y0 (which wouldn't work on 100T) |
I believe this issue is on the list of bugs to fix for useability reasons, so it will get resolved once other issues are closed. Other issues are being actively worked on, and I don't see this as a super high priority because of the ease of the workaround. Do you believe it needs a higher priority? |
Hi @litghost , that exact point of view occurred to me after I posted my note, so we're in complete agreement. It will get done eventually, but it's not blocking anyone now, so there's no urgency, and no reason to bump it to higher priority. |
@acomodi I believe this has been fixed? |
Yes, this has been fixed. Closing |
Error seen:
To reproduce:
xc/xc7/tests/soc/litex/mini_ddr/minilitex_ddr_arty100t.v
as follows:(* LOC="PLLE2_ADV_X1Y1" *)
cd
tobuild/xc/xc7/tests/soc/litex/mini_ddr
.make minilitex_ddr_arty100t_bin
to produce the error.Notes:
This is not blocking, since there is the workaround of adding the LOC constraint to the PLLE2_ADV.
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