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base repository: azonenberg/starshipraider
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head repository: azonenberg/starshipraider
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compare: 93d0d1e1b4b9
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  • 1 commit
  • 7 files changed
  • 1 contributor

Commits on May 28, 2020

  1. Copy the full SHA
    93d0d1e View commit details
Showing with 816 additions and 420 deletions.
  1. +53 −53 boards/MEAD/comparators.sch
  2. +5 −5 boards/MEAD/dac.sch
  3. +90 −122 boards/MEAD/inputs.sch
  4. +54 −14 boards/MEAD/la-pod-cache.lib
  5. +335 −100 boards/MEAD/la-pod.sch
  6. +272 −119 boards/MEAD/mcu.sch
  7. +7 −7 boards/MEAD/psu.sch
106 changes: 53 additions & 53 deletions boards/MEAD/comparators.sch

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10 changes: 5 additions & 5 deletions boards/MEAD/dac.sch
Original file line number Diff line number Diff line change
@@ -6,7 +6,7 @@ $Descr A4 11693 8268
encoding utf-8
Sheet 3 6
Title "Logic Analyzer Pod"
Date "2020-05-26"
Date "2020-05-28"
Rev "0.1"
Comp "Antikernel Labs"
Comment1 "Andrew D. Zonenberg"
@@ -63,7 +63,7 @@ U 1 1 5EA6D04D
P 5100 4400
F 0 "C33" H 5215 4446 50 0000 L CNN
F 1 "0.47 uF" H 5215 4355 50 0000 L CNN
F 2 "" H 5138 4250 50 0001 C CNN
F 2 "azonenberg_pcb:EIA_0402_CAP_NOSILK" H 5138 4250 50 0001 C CNN
F 3 "" H 5100 4400 50 0001 C CNN
1 5100 4400
1 0 0 -1
@@ -78,7 +78,7 @@ U 1 1 5EA6E20A
P 5700 4400
F 0 "C34" H 5815 4446 50 0000 L CNN
F 1 "4.7 uF" H 5815 4355 50 0000 L CNN
F 2 "" H 5738 4250 50 0001 C CNN
F 2 "azonenberg_pcb:EIA_0603_CAP_NOSILK" H 5738 4250 50 0001 C CNN
F 3 "" H 5700 4400 50 0001 C CNN
1 5700 4400
1 0 0 -1
@@ -93,7 +93,7 @@ U 1 1 5EA6ED77
P 6300 4400
F 0 "C35" H 6415 4446 50 0000 L CNN
F 1 "0.47 uF" H 6415 4355 50 0000 L CNN
F 2 "" H 6338 4250 50 0001 C CNN
F 2 "azonenberg_pcb:EIA_0402_CAP_NOSILK" H 6338 4250 50 0001 C CNN
F 3 "" H 6300 4400 50 0001 C CNN
1 6300 4400
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@@ -113,7 +113,7 @@ U 1 1 5EA6F907
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F 0 "C36" H 7315 4446 50 0000 L CNN
F 1 "0.47 uF" H 7315 4355 50 0000 L CNN
F 2 "" H 7238 4250 50 0001 C CNN
F 2 "azonenberg_pcb:EIA_0402_CAP_NOSILK" H 7238 4250 50 0001 C CNN
F 3 "" H 7200 4400 50 0001 C CNN
1 7200 4400
1 0 0 -1
212 changes: 90 additions & 122 deletions boards/MEAD/inputs.sch
Original file line number Diff line number Diff line change
@@ -5,11 +5,11 @@ EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 5 6
Title ""
Date "2020-05-26"
Rev ""
Comp ""
Comment1 ""
Title "Logic Analyzer Pod"
Date "2020-05-28"
Rev "0.1"
Comp "Antikernel Labs"
Comment1 "Andrew D. Zonenberg"
Comment2 ""
Comment3 ""
Comment4 ""
@@ -48,38 +48,12 @@ Text Label 1500 2300 2 50 ~ 0
GND
Text Label 1500 2500 2 50 ~ 0
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$Comp
L special-azonenberg:RCLAMP0542T U10
U 1 1 5ECE5387
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F 0 "U10" H 3650 1500 60 0000 L CNN
F 1 "RCLAMP0542T" H 3650 1400 60 0000 L CNN
F 2 "" H 3650 1550 60 0000 C CNN
F 3 "" H 3650 1550 60 0000 C CNN
1 3650 1550
1 0 0 -1
$EndComp
Text Label 3200 900 2 50 ~ 0
Text Label 3350 1300 2 50 ~ 0
CH0
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Text Label 3200 1100 2 50 ~ 0
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CH1
Wire Wire Line
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Wire Wire Line
3350 1100 3350 1200
Connection ~ 3350 1100
Text Label 3200 1400 2 50 ~ 0
Text Label 3350 1100 2 50 ~ 0
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Wire Wire Line
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Wire Wire Line
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Connection ~ 2000 1700
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@@ -152,102 +126,22 @@ Text HLabel 1500 2800 0 50 BiDi ~ 0
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Text HLabel 2000 2800 2 50 BiDi ~ 0
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$Comp
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F 2 "" H 3650 2550 60 0000 C CNN
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Text Label 3200 1900 2 50 ~ 0
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CH3
Wire Wire Line
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Wire Wire Line
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Connection ~ 3350 2100
Text Label 3200 2400 2 50 ~ 0
Text Label 3350 2050 2 50 ~ 0
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Wire Wire Line
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Wire Wire Line
4850 1100 4850 1200
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Text Label 4700 1400 2 50 ~ 0
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$Comp
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F 2 "" H 5150 2550 60 0000 C CNN
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$EndComp
Text Label 4700 1900 2 50 ~ 0
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Wire Wire Line
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Text Label 4700 2100 2 50 ~ 0
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Wire Wire Line
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Connection ~ 4850 2100
Text Label 4700 2400 2 50 ~ 0
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Wire Wire Line
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Connection ~ 4850 2400
Text HLabel 1500 900 0 50 Input ~ 0
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Text Notes 1400 4100 0 50 ~ 0
@@ -410,4 +304,78 @@ Wire Wire Line
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Wire Wire Line
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$Comp
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F 3 "" H 3600 1450 50 0001 C CNN
1 3600 1450
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$EndComp
Text HLabel 3350 800 0 50 Input ~ 0
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Wire Wire Line
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Wire Wire Line
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$Comp
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F 0 "D10" H 3600 2350 50 0000 L CNN
F 1 "SP4010" H 3600 2250 50 0000 L CNN
F 2 "" H 3600 2400 50 0001 C CNN
F 3 "" H 3600 2400 50 0001 C CNN
1 3600 2400
1 0 0 -1
$EndComp
Text Label 3350 1750 2 50 ~ 0
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Wire Wire Line
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Connection ~ 3350 1850
Wire Wire Line
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$Comp
L special-azonenberg:SP4010 D11
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F 0 "D11" H 4700 1400 50 0000 L CNN
F 1 "SP4010" H 4700 1300 50 0000 L CNN
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F 3 "" H 4700 1450 50 0001 C CNN
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1 0 0 -1
$EndComp
Text Label 4450 800 2 50 ~ 0
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Wire Wire Line
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Connection ~ 4450 900
Wire Wire Line
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$Comp
L special-azonenberg:SP4010 D12
U 1 1 5EE0E0E3
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F 0 "D12" H 4700 2350 50 0000 L CNN
F 1 "SP4010" H 4700 2250 50 0000 L CNN
F 2 "" H 4700 2400 50 0001 C CNN
F 3 "" H 4700 2400 50 0001 C CNN
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1 0 0 -1
$EndComp
Text Label 4450 2050 2 50 ~ 0
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Wire Wire Line
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Connection ~ 4450 1850
Wire Wire Line
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$EndSCHEMATC
68 changes: 54 additions & 14 deletions boards/MEAD/la-pod-cache.lib
Original file line number Diff line number Diff line change
@@ -353,11 +353,51 @@ X AGND 4 -100 350 100 R 50 50 1 1 W
X FB 5 650 150 100 L 50 50 1 1 I
X VOS 6 650 250 100 L 50 50 1 1 I
X SW 7 650 550 100 L 50 50 1 1 O
X PG 8 650 450 100 L 50 50 1 1 O
X PG 8 650 450 100 L 50 50 1 1 C
X AGND PAD -100 250 100 R 50 50 1 1 I
ENDDRAW
ENDDEF
#
# special-azonenberg_AMG240160P-G-W6WFDW
#
DEF special-azonenberg_AMG240160P-G-W6WFDW J 0 40 Y Y 1 F N
F0 "J" 0 -50 50 H V L CNN
F1 "special-azonenberg_AMG240160P-G-W6WFDW" 0 -150 50 H V L CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
S 0 1700 850 0 0 1 0 f
X VLCD 1 -250 1650 250 R 50 50 1 1 w
X TST4 10 1100 1650 250 L 50 50 1 1 N
X BM1 11 1100 1450 250 L 50 50 1 1 I
X BM0 12 1100 1350 250 L 50 50 1 1 I
X CS0 13 -250 450 250 R 50 50 1 1 I
X CD 14 -250 350 250 R 50 50 1 1 I
X WR1 15 1100 950 250 L 50 50 1 1 I
X WR0 16 1100 850 250 L 50 50 1 1 I
X RST 17 -250 250 250 R 50 50 1 1 I
X D0/SCK 18 -250 150 250 R 50 50 1 1 I
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X D3 21 1100 450 250 L 50 50 1 1 I
X D4 22 1100 350 250 L 50 50 1 1 I
X D5 23 1100 250 250 L 50 50 1 1 I
X D6 24 1100 150 250 L 50 50 1 1 I
X D7 25 1100 50 250 L 50 50 1 1 I
X D8/SDA 26 -250 50 250 R 50 50 1 1 I
X D13 27 1100 1250 250 L 50 50 1 1 I
X D15 28 1100 1150 250 L 50 50 1 1 I
X VS- 3 -250 1450 250 R 50 50 1 1 w
X VB0- 4 -250 1350 250 R 50 50 1 1 w
X VB1- 5 -250 1250 250 R 50 50 1 1 w
X VB1+ 6 -250 1150 250 R 50 50 1 1 w
X VB0+ 7 -250 1050 250 R 50 50 1 1 w
X VDD 8 -250 850 250 R 50 50 1 1 W
X VSS 9 -250 750 250 R 50 50 1 1 W
ENDDRAW
ENDDEF
#
# special-azonenberg_CONN_SFF8087
#
DEF special-azonenberg_CONN_SFF8087 J 0 40 Y Y 2 L N
@@ -407,21 +447,21 @@ X TX1_N B6 -100 1850 100 R 50 50 2 1 P
ENDDRAW
ENDDEF
#
# special-azonenberg_RCLAMP0542T
# special-azonenberg_SP4010
#
DEF special-azonenberg_RCLAMP0542T U 0 40 Y Y 1 F N
F0 "U" 200 -50 60 H V C CNN
F1 "special-azonenberg_RCLAMP0542T" 250 -150 60 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
DEF special-azonenberg_SP4010 D 0 40 Y Y 1 F N
F0 "D" 50 -50 50 H V C CNN
F1 "special-azonenberg_SP4010" 150 -150 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
S 0 700 450 0 0 1 0 f
X LINE_1 1 -300 650 300 R 50 50 1 1 P
X LINE_2 2 -300 450 300 R 50 50 1 1 P
X Gnd 3 -300 150 300 R 50 50 1 1 W
X Gnd 4 -300 50 300 R 50 50 1 1 W
X NC_2 5 -300 350 300 R 50 50 1 1 P
X NC_1 6 -300 550 300 R 50 50 1 1 P
S 0 700 400 0 0 1 0 f
X IO1 1 -250 150 250 R 50 50 1 1 P
X GND 2 -250 350 250 R 50 50 1 1 W
X IO2 3 -250 50 250 R 50 50 1 1 P
X VDD 4 -250 650 250 R 50 50 1 1 W
X VDD 5 -250 550 250 R 50 50 1 1 W
X VDD 6 -250 450 250 R 50 50 1 1 W
ENDDRAW
ENDDEF
#
435 changes: 335 additions & 100 deletions boards/MEAD/la-pod.sch

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391 changes: 272 additions & 119 deletions boards/MEAD/mcu.sch

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14 changes: 7 additions & 7 deletions boards/MEAD/psu.sch
Original file line number Diff line number Diff line change
@@ -6,7 +6,7 @@ $Descr A4 11693 8268
encoding utf-8
Sheet 4 6
Title "Logic Analyzer Pod"
Date "2020-05-26"
Date "2020-05-28"
Rev "0.1"
Comp "Antikernel Labs"
Comment1 "Andrew D. Zonenberg"
@@ -76,7 +76,7 @@ U 1 1 5EBA49F3
P 3300 1350
F 0 "L1" V 3142 1350 40 0000 C CNN
F 1 "1277AS-H-2R2M=P2" V 3218 1350 40 0000 C CNN
F 2 "" H 3300 1350 60 0000 C CNN
F 2 "" H 3300 1350 60 0001 C CNN
F 3 "" H 3300 1350 60 0000 C CNN
1 3300 1350
0 1 1 0
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P 2200 2700
F 0 "U8" H 2225 3297 60 0000 C CNN
F 1 "LP5907SNX-3.3/NOPB" H 2225 3191 60 0000 C CNN
F 2 "" H 2200 2600 60 0000 C CNN
F 2 "" H 2200 2600 60 0001 C CNN
F 3 "" H 2200 2600 60 0000 C CNN
1 2200 2700
1 0 0 -1
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F 0 "L2" V 3142 3050 40 0000 C CNN
F 1 "1277AS-H-2R2M=P2" V 3218 3050 40 0000 C CNN
F 2 "" H 3300 3050 60 0000 C CNN
F 2 "" H 3300 3050 60 0001 C CNN
F 3 "" H 3300 3050 60 0000 C CNN
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F 0 "L3" V 3142 4050 40 0000 C CNN
F 1 "1277AS-H-2R2M=P2" V 3218 4050 40 0000 C CNN
F 2 "" H 3300 4050 60 0000 C CNN
F 2 "" H 3300 4050 60 0001 C CNN
F 3 "" H 3300 4050 60 0000 C CNN
1 3300 4050
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P 1100 5150
F 0 "C39" H 1215 5196 50 0000 L CNN
F 1 "4.7 uF" H 1215 5105 50 0000 L CNN
F 2 "" H 1138 5000 50 0001 C CNN
F 2 "azonenberg_pcb:EIA_0603_CAP_NOSILK" H 1138 5000 50 0001 C CNN
F 3 "" H 1100 5150 50 0001 C CNN
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F 2 "" H 3238 4700 50 0001 C CNN
F 2 "azonenberg_pcb:EIA_0603_CAP_NOSILK" H 3238 4700 50 0001 C CNN
F 3 "" H 3200 4850 50 0001 C CNN
1 3200 4850
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