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base repository: amaranth-lang/amaranth
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  • 1 commit
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Commits on May 21, 2020

  1. vendor.xilinx_{7series,ultrascale}: don't use write_verilog -decimal.

    In commit 892cff0, `-decimal` was used when writing Verilog for
    Vivado targets because it treats (* keep=32'd1 *) and (* keep=1 *)
    differently in violation of Verilog LRM. However, it is possible
    to avoid that workaround by using (* keep="TRUE" *). Do that,
    and remove `-decimal` to avoid special-casing 32-bit constants.
    
    Refs #373.
    whitequark committed May 21, 2020
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