New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
Can't instantiate a Tristate without input #406
Comments
Why are you using |
I'm using it because I'm trying to migrate oMigen code to nMigen and |
The right thing in this case would be to figure out exactly what kind of IO you need and then instantiate it. Can you show me the oMigen code? |
This: https://github.com/enjoy-digital/litedram/blob/master/litedram/phy/ecp5ddrphy.py I'm almost certain that I could use the "io" type and control all directions at one for DQ/DQS, but I'd still like to know how to individually set IO directions without defining a subsignal for each pin. |
The general answer is: if you actually have to do that to implement an interface, then the board definition (and, in fact, every board definition in nmigen-boards that includes this interface) should be changed to have separate subsignals per pin. For DDR on ECP5 specifically, I would suggest that you use a On reflection, I also agree that the current implementation of the |
(The issue with the |
The above example code generates the following error:
As a quick workaround you can use Signal() instead of None as the input default value.
The text was updated successfully, but these errors were encountered: