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VPR prunes IDELAYCTRL during netlist optimization #1470

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mkurc-ant opened this issue May 6, 2020 · 3 comments
Closed

VPR prunes IDELAYCTRL during netlist optimization #1470

mkurc-ant opened this issue May 6, 2020 · 3 comments

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@mkurc-ant
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This happens as in the regular use case an IDELAYCTRL has only input pins connected which makes VPR treat it as a block with no relevance to the circuit operation. There is the RDY output which can be connected to something to prevent that but that is merely a workaround.
@mkurc-ant
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Idea 1 - Upgrade VPR so it can have special annotations on model/pb_type which informs it that should neven be pruned.

Idea 2 (may be a separate thing) - Make VPR understand netlist cell attributes like "KEEP".

@acomodi acomodi mentioned this issue Aug 18, 2020
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@litghost
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@acomodi I believe this has been fixed?

@acomodi
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acomodi commented Oct 29, 2020

Yes, this has been fixed on VPR upstream, closing.

@acomodi acomodi closed this as completed Oct 29, 2020
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@litghost @acomodi @mkurc-ant