You signed in with another tab or window. Reload to refresh your session.You signed out in another tab or window. Reload to refresh your session.You switched accounts on another tab or window. Reload to refresh your session.Dismiss alert
I was asked to follow the tutorial available at [LINK]
I have completed the tutorial successfully and obtained the .blif file. The presented approach to sv2v is different than those used for OpenTitan (#1442). Previously, I was converting files one-by-one. It will be worth to compare the netlists obtained using the approach presented in the tutorial, with netlist obtained from converting file one-by-one.
However, this tutorial uses the design variant dedicated for simulation purposes, so additional changes need to be added for FPGA variant conversion.
The text was updated successfully, but these errors were encountered:
I was asked to follow the tutorial available at [LINK]
I have completed the tutorial successfully and obtained the
.blif
file. The presented approach tosv2v
is different than those used for OpenTitan (#1442). Previously, I was converting files one-by-one. It will be worth to compare the netlists obtained using the approach presented in the tutorial, with netlist obtained from converting file one-by-one.However, this tutorial uses the design variant dedicated for simulation purposes, so additional changes need to be added for FPGA variant conversion.
The text was updated successfully, but these errors were encountered: