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Some designs that use IDELAYs from only one clock region instantiate an IDELAYCTRL without explicitly specifying its placement location. The toolchain places it automatically in the correct clock region. Currently in SymbiFlow there is no such a mechanism. It is required to use eg. LiteX generated DDR memory interface without the need of manually placing the IDELAYCTRL
The text was updated successfully, but these errors were encountered:
The clock placer script could be generalize to support this. Also not that there is a property "delay_groups" I believe that is intended to hint at this.
Some designs that use IDELAYs from only one clock region instantiate an IDELAYCTRL without explicitly specifying its placement location. The toolchain places it automatically in the correct clock region. Currently in SymbiFlow there is no such a mechanism. It is required to use eg. LiteX generated DDR memory interface without the need of manually placing the IDELAYCTRL
The text was updated successfully, but these errors were encountered: