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base repository: azonenberg/starshipraider
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  • 1 commit
  • 7 files changed
  • 1 contributor

Commits on May 31, 2020

  1. Increased impedance of 12V_SENSE divider, added parallel capacitor to… 

    … ADC
    @azonenberg
    azonenberg committed May 31, 2020
    Copy the full SHA
    e7d3175 View commit details
Showing with 53 additions and 12 deletions.
  1. +1 −1 boards/MEAD/comparators.sch
  2. +1 −1 boards/MEAD/dac.sch
  3. +1 −1 boards/MEAD/inputs.sch
  4. +29 −4 boards/MEAD/la-pod.kicad_pcb
  5. +19 −3 boards/MEAD/la-pod.sch
  6. +1 −1 boards/MEAD/mcu.sch
  7. +1 −1 boards/MEAD/psu.sch
2 changes: 1 addition & 1 deletion boards/MEAD/comparators.sch
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Original file line number Diff line number Diff line change
@@ -6,7 +6,7 @@ $Descr A4 11693 8268
encoding utf-8
Sheet 6 6
Title "Logic Analyzer Pod"
Date "2020-05-30"
Date "2020-05-31"
Rev "0.1"
Comp "Antikernel Labs"
Comment1 "Andrew D. Zonenberg"
2 changes: 1 addition & 1 deletion boards/MEAD/dac.sch
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Original file line number Diff line number Diff line change
@@ -6,7 +6,7 @@ $Descr A4 11693 8268
encoding utf-8
Sheet 3 6
Title "Logic Analyzer Pod"
Date "2020-05-30"
Date "2020-05-31"
Rev "0.1"
Comp "Antikernel Labs"
Comment1 "Andrew D. Zonenberg"
2 changes: 1 addition & 1 deletion boards/MEAD/inputs.sch
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Original file line number Diff line number Diff line change
@@ -6,7 +6,7 @@ $Descr A4 11693 8268
encoding utf-8
Sheet 5 6
Title "Logic Analyzer Pod"
Date "2020-05-30"
Date "2020-05-31"
Rev "0.1"
Comp "Antikernel Labs"
Comment1 "Andrew D. Zonenberg"
33 changes: 29 additions & 4 deletions boards/MEAD/la-pod.kicad_pcb
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Original file line number Diff line number Diff line change
@@ -3,9 +3,9 @@
(general
(thickness 1.6)
(drawings 11)
(tracks 5429)
(tracks 5434)
(zones 0)
(modules 208)
(modules 209)
(nets 109)
)

@@ -337,6 +337,26 @@
(add_net "Net-(U5-Pad9)")
)

(module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 5ED715AD)
(at 45.5 28.5)
(path /5F3C8CBA)
(fp_text reference C74 (at -0.1 -1) (layer F.SilkS)
(effects (font (size 0.75 0.75) (thickness 0.1)))
)
(fp_text value "0.47 uF" (at 0.05 3.1) (layer F.SilkS) hide
(effects (font (size 1 1) (thickness 0.15)))
)
(pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask)
(net 1 /GND))
(pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask)
(net 107 /12V_SENSE))
(model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)

(module azonenberg_pcb:DFN_8_0.5MM_3x3MM (layer F.Cu) (tedit 54AFBB8A) (tstamp 5ED70054)
(at 43.5 59.5 180)
(path /5E895DC2/5F38D677)
@@ -437,7 +457,7 @@
(fp_text reference R79 (at 0 -1 90) (layer B.SilkS)
(effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror))
)
(fp_text value 10K (at 0 -3.5 90) (layer B.SilkS) hide
(fp_text value 47K (at 0 -3.5 90) (layer B.SilkS) hide
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask)
@@ -457,7 +477,7 @@
(fp_text reference R78 (at 0 -1.5 90) (layer B.SilkS)
(effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror))
)
(fp_text value 2.2K (at 0 -3.5 90) (layer B.SilkS) hide
(fp_text value 10K (at 0 -3.5 90) (layer B.SilkS) hide
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask)
@@ -9265,6 +9285,10 @@
(segment (start 51.861092 58) (end 53.611092 58) (width 0.125) (layer In1.Cu) (net 1))
(segment (start 51.25 57.388908) (end 51.861092 58) (width 0.125) (layer In1.Cu) (net 1))
(segment (start 51.25 57) (end 51.25 57.388908) (width 0.125) (layer In1.Cu) (net 1))
(via (at 46.6 28.5) (size 0.55) (drill 0.25) (layers F.Cu B.Cu) (net 1))
(segment (start 46 28.5) (end 46.6 28.5) (width 0.125) (layer F.Cu) (net 1))
(segment (start 44.6 28.5) (end 43.5 29.6) (width 0.125) (layer In1.Cu) (net 1))
(segment (start 46.6 28.5) (end 44.6 28.5) (width 0.125) (layer In1.Cu) (net 1))
(via (at 93.7 26.5) (size 0.55) (drill 0.25) (layers F.Cu B.Cu) (net 2))
(segment (start 93.7 26.5) (end 93 26.5) (width 0.225) (layer F.Cu) (net 2) (status 20))
(segment (start 95.46493 26.5) (end 95.51493 26.45) (width 0.225) (layer F.Cu) (net 2) (status 30))
@@ -12906,6 +12930,7 @@
(segment (start 53.362501 29.462501) (end 53 29.1) (width 0.125) (layer B.Cu) (net 107))
(segment (start 67.125 31.5) (end 65.087501 29.462501) (width 0.125) (layer B.Cu) (net 107))
(segment (start 67.5 31.5) (end 67.125 31.5) (width 0.125) (layer B.Cu) (net 107))
(segment (start 45 28.5) (end 45 29.1) (width 0.125) (layer F.Cu) (net 107))
(segment (start 67.5 34.1) (end 67.5 32.5) (width 0.125) (layer B.Cu) (net 108))

(zone (net 1) (net_name /GND) (layer F.Cu) (tstamp 5ED6AF32) (hatch edge 0.508)
22 changes: 19 additions & 3 deletions boards/MEAD/la-pod.sch
View file
Original file line number Diff line number Diff line change
@@ -6,7 +6,7 @@ $Descr A4 11693 8268
encoding utf-8
Sheet 1 6
Title "Logic Analyzer Pod"
Date "2020-05-30"
Date "2020-05-31"
Rev "0.1"
Comp "Antikernel Labs"
Comment1 "Andrew D. Zonenberg"
@@ -791,7 +791,7 @@ L device:R R79
U 1 1 5F38359A
P 6700 4500
F 0 "R79" V 6600 4500 50 0000 C CNN
F 1 "10K" V 6700 4500 50 0000 C CNN
F 1 "47K" V 6700 4500 50 0000 C CNN
F 2 "azonenberg_pcb:EIA_0402_RES_NOSILK" V 6630 4500 50 0001 C CNN
F 3 "" H 6700 4500 50 0001 C CNN
1 6700 4500
@@ -802,7 +802,7 @@ L device:R R78
U 1 1 5F383EFD
P 5900 4500
F 0 "R78" V 5800 4500 50 0000 C CNN
F 1 "2.2K" V 5900 4500 50 0000 C CNN
F 1 "10K" V 5900 4500 50 0000 C CNN
F 2 "azonenberg_pcb:EIA_0402_RES_NOSILK" V 5830 4500 50 0001 C CNN
F 3 "" H 5900 4500 50 0001 C CNN
1 5900 4500
@@ -816,4 +816,20 @@ Text Label 1700 1850 0 50 ~ 0
12V0_FUSED
Text Label 6850 4500 0 50 ~ 0
12V0_FUSED
$Comp
L device:C C74
U 1 1 5F3C8CBA
P 5900 4250
F 0 "C74" V 5648 4250 50 0000 C CNN
F 1 "0.47 uF" V 5739 4250 50 0000 C CNN
F 2 "azonenberg_pcb:EIA_0402_CAP_NOSILK" H 5938 4100 50 0001 C CNN
F 3 "" H 5900 4250 50 0001 C CNN
1 5900 4250
0 1 1 0
$EndComp
Wire Wire Line
5750 4250 5750 4500
Wire Wire Line
6050 4250 6050 4500
Connection ~ 6050 4500
$EndSCHEMATC
2 changes: 1 addition & 1 deletion boards/MEAD/mcu.sch
View file
Original file line number Diff line number Diff line change
@@ -6,7 +6,7 @@ $Descr A4 11693 8268
encoding utf-8
Sheet 2 6
Title "Logic Analyzer Pod"
Date "2020-05-30"
Date "2020-05-31"
Rev "0.1"
Comp "Antikernel Labs"
Comment1 "Andrew D. Zonenberg"
2 changes: 1 addition & 1 deletion boards/MEAD/psu.sch
View file
Original file line number Diff line number Diff line change
@@ -6,7 +6,7 @@ $Descr A4 11693 8268
encoding utf-8
Sheet 4 6
Title "Logic Analyzer Pod"
Date "2020-05-30"
Date "2020-05-31"
Rev "0.1"
Comp "Antikernel Labs"
Comment1 "Andrew D. Zonenberg"