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base repository: azonenberg/starshipraider
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base: 484ed51f6f40
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head repository: azonenberg/starshipraider
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compare: b89bc90d11c6
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  • 1 commit
  • 4 files changed
  • 1 contributor

Commits on Jun 16, 2020

  1. Copy the full SHA
    b89bc90 View commit details
Showing with 787 additions and 21 deletions.
  1. +4 −0 boards/MAXWELL/maxwell-main/clocking.sch
  2. +20 −9 boards/MAXWELL/maxwell-main/maxwell-main.sch
  3. +2 −0 boards/MAXWELL/maxwell-main/psu.sch
  4. +761 −12 boards/MAXWELL/maxwell-main/ram.sch
4 changes: 4 additions & 0 deletions boards/MAXWELL/maxwell-main/clocking.sch
Original file line number Diff line number Diff line change
@@ -103,4 +103,8 @@ Text HLabel 8700 4150 0 50 Input ~ 0
GTX_TRIG_OUT_P
Text HLabel 8700 4250 0 50 Input ~ 0
GTX_TRIG_OUT_N
Text HLabel 4100 5600 0 50 Output ~ 0
RAM_CLK_P
Text HLabel 4100 5700 0 50 Output ~ 0
RAM_CLK_N
$EndSCHEMATC
29 changes: 20 additions & 9 deletions boards/MAXWELL/maxwell-main/maxwell-main.sch
Original file line number Diff line number Diff line change
@@ -54,14 +54,17 @@ F16 "K7_RST_N" O R 7750 3650 50
F17 "K7_DONE" I R 7750 3550 50
$EndSheet
$Sheet
S 1000 3000 1000 1500
S 1000 3000 1050 1150
U 5EDD71F2
F0 "RAM" 50
F1 "ram.sch" 50
F2 "1V5" I R 2000 3050 50
F3 "GND" I R 2000 3350 50
F4 "RAM_VREF" I R 2000 3150 50
F5 "RAM_VTT" I R 2000 3250 50
F2 "1V5" I R 2050 3150 50
F3 "GND" I R 2050 3450 50
F4 "RAM_VREF" I R 2050 3250 50
F5 "RAM_VTT" I R 2050 3350 50
F6 "3V3" O R 2050 3050 50
F7 "RAM_CLK_P" I R 2050 3850 50
F8 "RAM_CLK_N" I R 2050 3950 50
$EndSheet
$Sheet
S 4500 1000 1400 2050
@@ -177,6 +180,8 @@ F19 "TRIG_OUT_P" I R 4000 2550 50
F20 "TRIG_OUT_N" I R 4000 2650 50
F21 "GTX_TRIG_OUT_P" I R 4000 2850 50
F22 "GTX_TRIG_OUT_N" I R 4000 2950 50
F23 "RAM_CLK_P" O L 2500 3850 50
F24 "RAM_CLK_N" O L 2500 3950 50
$EndSheet
Wire Wire Line
4000 1050 4500 1050
@@ -332,12 +337,18 @@ Text Label 3550 5950 0 50 ~ 0
RAM_VREF
Text Label 3550 6050 0 50 ~ 0
RAM_VTT
Text Label 2000 3050 0 50 ~ 0
Text Label 2050 3150 0 50 ~ 0
1V5
Text Label 2000 3150 0 50 ~ 0
Text Label 2050 3250 0 50 ~ 0
RAM_VREF
Text Label 2000 3250 0 50 ~ 0
Text Label 2050 3350 0 50 ~ 0
RAM_VTT
Text Label 2000 3350 0 50 ~ 0
Text Label 2050 3450 0 50 ~ 0
GND
Wire Wire Line
2500 3950 2050 3950
Wire Wire Line
2050 3850 2500 3850
Text Label 2050 3050 0 50 ~ 0
3V3
$EndSCHEMATC
2 changes: 2 additions & 0 deletions boards/MAXWELL/maxwell-main/psu.sch
Original file line number Diff line number Diff line change
@@ -39,4 +39,6 @@ Text HLabel 3550 3100 0 50 Output ~ 0
RAM_VREF
Text HLabel 3500 3200 0 50 Output ~ 0
RAM_VTT
Text Notes 4400 2250 0 50 ~ 0
Vtt needs to ramp after 1V5
$EndSCHEMATC
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