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For now we do not fully understand how the COMPENSATION parameter actually works. The documentation in prjxray contains various features that do not necessarily correspond to their verilog parameter counterparts.
Tests on hardware showed that the feature COMPENSATION.Z_ZHOLD_OR_CLKIN_BUF has to be set in order for the PLL to work.
Attempt to implement a design with an external PLL feedback (through IO pins) failed so far.
The text was updated successfully, but these errors were encountered:
For now we do not fully understand how the
COMPENSATION
parameter actually works. The documentation in prjxray contains various features that do not necessarily correspond to their verilog parameter counterparts.Tests on hardware showed that the feature
COMPENSATION.Z_ZHOLD_OR_CLKIN_BUF
has to be set in order for the PLL to work.Attempt to implement a design with an external PLL feedback (through IO pins) failed so far.
The text was updated successfully, but these errors were encountered: