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vendor.intel: reset synchronisers #246

Merged
merged 4 commits into from Oct 9, 2019
Merged

vendor.intel: reset synchronisers #246

merged 4 commits into from Oct 9, 2019

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Ravenslofty
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I couldn't actually find any documentation on this, so I'm working based on the simulation model for this, and hoping for the best.

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codecov bot commented Oct 9, 2019

Codecov Report

Merging #246 into vendor.altera will increase coverage by 0.18%.
The diff coverage is n/a.

Impacted file tree graph

@@                Coverage Diff                @@
##           vendor.altera     #246      +/-   ##
=================================================
+ Coverage          82.33%   82.52%   +0.18%     
=================================================
  Files                 33       33              
  Lines               5514     5498      -16     
  Branches            1180     1180              
=================================================
- Hits                4540     4537       -3     
+ Misses               839      824      -15     
- Partials             135      137       +2
Impacted Files Coverage Δ
nmigen/tracer.py 89.18% <0%> (-5.41%) ⬇️
nmigen/hdl/ir.py 93.86% <0%> (-0.26%) ⬇️
nmigen/back/rtlil.py 83.93% <0%> (+0.13%) ⬆️
nmigen/hdl/ast.py 87.42% <0%> (+1.47%) ⬆️

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nmigen/vendor/intel.py Outdated Show resolved Hide resolved
nmigen/vendor/intel.py Outdated Show resolved Hide resolved
def get_reset_sync(self, reset_sync):
m = Module()
reset = Signal()
reset_clk = ClockSignal(reset_sync._domain)
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I think you can just use ClockSignal and ResetSignal directly in instance ports.

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2 participants