Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Support Xilinx XC9500XL CPLD series #38

Open
spth opened this issue Nov 26, 2019 · 1 comment
Open

Support Xilinx XC9500XL CPLD series #38

spth opened this issue Nov 26, 2019 · 1 comment

Comments

@spth
Copy link

spth commented Nov 26, 2019

The Xilinx XC9500XL series is a popular CPLD series. It's 5V-tolerance, relatively low price, and many I/O pins make it a good choice for many projects.

IMO, this would be a good candiate for a new device to support by a free toolchain.

Xilinx is killing off its own non-free XC9500XL toolchain: The XC9500XL is only supported by older versions of the Xilinx WebISE tool, which itself is already deprecated in favour of the newer Vivado.

The XC9500XL being a CPLD series, not an FPGA series resulting in relative simplicity should make it easier to reverse-engineer and to target in synthesis.

@YusefIiqbal
Copy link

So, what exactly would we've to do?

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

No branches or pull requests

2 participants