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A little help with defining platform pins? #278
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Correct. The default clock/reset mechanism works as follows. If your HDL uses the
If your HDL never uses the If you do not have a
There is fundamentally nothing special about clocks and resets. You can do something like m.domains.ph1 = ph1 = ClockDomain("ph1", clk_edge="pos")
m.domains.ph1 = ph2 = ClockDomain("ph2", clk_edge="neg")
clk = platform.request("some_clk")
rst = platform.request("some_rst")
m.d.comb += [
ph1.clk.eq(clk.i),
ph2.clk.eq(clk.i),
ph1.rst.eq(rst.i),
ph2.rst.eq(rst.i),
]
Yes, if the pin will always be an input (in most cases, the pin direction is well-known). In the rare case where for some reason you want to have a GPIO resource (not a connector), you can omit
Yes. The default resource number is 0, so for singleton resources (one you're pretty sure you will only have one of), you can omit it.
All correct. |
Thank you, that definitely helps me, especially the hint about |
I'm looking at the ice40hx8k, and I vaguely understand the blinky example, but it's not really clear from that, nor from the source, how to define and use my own resources and pins.
It seems there must be a default clock defined, and it seems to be used for a reset delay. Also, it vaguely seems to be connected to the
sync
domain.a. What if I don't have a
sync
domain? What if I have instead two clock domains namedph1
andph2
? I can define these resources, but how do I say which is connected toph1.clk
and which isph2.clk
? And what about their resets -- how are pins configured as the resets (not talking about CRESET_B which seems to reload the entire FPGA configuration)?And do I use it like this?
I'm pretty sure I understand the following correctly, but I'd like some confirmation:
It seems the directions are
i, o, io, oe
. Going from what I think I see inplat.py
, I think these meaninput
,output
,bidirectional
, andtristate output
, right?Is an input accessed via
<signal>.i
? Output via<signal>.o
? A tristate via<signal>.o
for the output and<signal>.oe
for the output enable? And a bidirectional via<signal>.o
for the output,<signal>.i
for the input, and<signal>.oe
for the direction (0 = input, 1 = output)?For pins with
invert=True
, is it correct that<signal>.i
is the invert of the signal present on the physical pin? And that<signal>.o
is likewise the invert of the signal that will be output to the physical pin?The text was updated successfully, but these errors were encountered: