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base repository: m-labs/nmigen
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head repository: m-labs/nmigen
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compare: 9b398b502e23
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  • 1 commit
  • 2 files changed
  • 1 contributor

Commits on Sep 8, 2019

  1. hdl.ast: check type of Sample(domain=...).

    Fixes #199.
    whitequark committed Sep 8, 2019
    Copy the full SHA
    9b398b5 View commit details
Showing with 10 additions and 2 deletions.
  1. +4 −1 nmigen/hdl/ast.py
  2. +6 −1 nmigen/test/test_hdl_ast.py
5 changes: 4 additions & 1 deletion nmigen/hdl/ast.py
Original file line number Diff line number Diff line change
@@ -983,11 +983,14 @@ def __init__(self, expr, clocks, domain, *, src_loc_at=0):
self.clocks = int(clocks)
self.domain = domain
if not isinstance(self.value, (Const, Signal, ClockSignal, ResetSignal, Initial)):
raise TypeError("Sampled value may only be a signal or a constant, not {!r}"
raise TypeError("Sampled value must be a signal or a constant, not {!r}"
.format(self.value))
if self.clocks < 0:
raise ValueError("Cannot sample a value {} cycles in the future"
.format(-self.clocks))
if not (self.domain is None or isinstance(self.domain, str)):
raise TypeError("Domain name must be a string or None, not {!r}"
.format(self.domain))

def shape(self):
return self.value.shape()
7 changes: 6 additions & 1 deletion nmigen/test/test_hdl_ast.py
Original file line number Diff line number Diff line change
@@ -629,7 +629,7 @@ def test_signal(self):

def test_wrong_value_operator(self):
with self.assertRaises(TypeError,
"Sampled value may only be a signal or a constant, not "
"Sampled value must be a signal or a constant, not "
"(+ (sig $signal) (const 1'd1))"):
Sample(Signal() + 1, 1, "sync")

@@ -638,6 +638,11 @@ def test_wrong_clocks_neg(self):
"Cannot sample a value 1 cycles in the future"):
Sample(Signal(), -1, "sync")

def test_wrong_domain(self):
with self.assertRaises(TypeError,
"Domain name must be a string or None, not 0"):
Sample(Signal(), 1, 0)


class InitialTestCase(FHDLTestCase):
def test_initial(self):