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This is useful in case the target has BRAMs with variable aspect ratio (most of them do, if not all), and some platform independent gateware that has flexible BRAM requirements, e.g. a crossbar with a FIFO, wants to know the BRAM depth it should specify to avoid having any unused BRAM left over.
The text was updated successfully, but these errors were encountered:
It does not appear to be possible to calculate optimal BRAM depth for e.g. Xilinx Series 7 because it depends on the port configuration. Therefore I think nMigen should not provide this functionality, at least until someone comes up with a robust semantics that would fit most applications.
This is useful in case the target has BRAMs with variable aspect ratio (most of them do, if not all), and some platform independent gateware that has flexible BRAM requirements, e.g. a crossbar with a FIFO, wants to know the BRAM depth it should specify to avoid having any unused BRAM left over.
The text was updated successfully, but these errors were encountered: