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vendor.intel: silence meaningless warnings #277

Merged
merged 2 commits into from Dec 1, 2019
Merged

vendor.intel: silence meaningless warnings #277

merged 2 commits into from Dec 1, 2019

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Ravenslofty
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@Ravenslofty Ravenslofty commented Nov 30, 2019

Quartus complains a lot while building Yosys-generated Verilog:

  • it fails some subjective lints (warnings 10270, 10763, 10935) that don't affect the semantics (modulo Yosys bugs).
  • Quartus doesn't recognise certain attributes like src (warning 10335) generated by nMigen.
  • Quartus will use its internal IP library whenever you instantiate a megafunction, and warn about it not being within the settings file (warning 12125).
  • Quartus complains whenever you set NUM_PARALLEL_PROCESSORS to something which isn't all cores (warning 18236).
  • Quartus Lite will also complain about unimportant features only being available when you buy Quartus (warning 292013).

These can be silenced through the creation of a .srf file (which in this case suppresses all message text with a given ID in quartus_suppressed_warnings).

Of these, all but 10335 are effectively harmless. Silencing 10335 has the potential to obscure a misspelt user attribute, so I could remove it if you'd prefer.

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codecov bot commented Nov 30, 2019

Codecov Report

Merging #277 into master will not change coverage.
The diff coverage is n/a.

Impacted file tree graph

@@           Coverage Diff           @@
##           master     #277   +/-   ##
=======================================
  Coverage   82.04%   82.04%           
=======================================
  Files          34       34           
  Lines        5674     5674           
  Branches     1165     1165           
=======================================
  Hits         4655     4655           
  Misses        874      874           
  Partials      145      145
Impacted Files Coverage Δ
nmigen/tracer.py 94.59% <0%> (ø) ⬆️
nmigen/hdl/ir.py 94.43% <0%> (ø) ⬆️
nmigen/back/pysim.py 92.32% <0%> (ø) ⬆️
nmigen/hdl/ast.py 86.28% <0%> (ø) ⬆️

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@whitequark
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  • Quartus doesn't recognise certain attributes like src (warning 10335) generated by nMigen.

Hang on. Aren't these stripped? #220 should have fixed that.

@Ravenslofty
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Indeed they are; my nMigen was a little out of date.

@Ravenslofty
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Info (10264): Verilog HDL Case Statement information at top.v(669): all case item expressions in this case statement are
 onehot File: //wsl$/Ubuntu-18.04/home/lofty/runelord/gateware/runelord/build/top.v Line: 669

This should probably be silenced.

@whitequark
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Sure. Is there any way to silence those Verilog warnings only for nMigen-emitted code?

@Ravenslofty
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One of the fields seems to be a keyword match. We can include the nMigen-emitted filenames in that.

@whitequark
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Sounds OK.

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2 participants