I use compile xdc as a part of yosys for cygwin and I found that it could use! Then I tested as here:
`yosys -import

read_verilog counter.v

synth_xilinx -flatten -abc9 -nosrl -noclkbuf -nodsp

read_xdc -part_json xc7a35tcsg324-1.json counter.xdc

write_json "counter.json"
`
but the result was not well and then I changed the code to print the wrong information as here:

`#set_property LOC R2 [get_ports led]
#OBUF_6
set_property DRIVE 12 [get_ports {led[0]}]
#OBUF_7
set_property IN_TERM UNTUNED_SPLIT_40 [get_ports {led[1]}]
set_property SLEW FAST [get_ports {led[1]}]
set_property IOSTANDARD SSTL135 [get_ports {led[1]}]
#OBUF_OUT
set_property IN_TERM UNTUNED_SPLIT_50 [get_ports {out_a}]
set_property SLEW FAST [get_ports {out_a}]
set_property IOSTANDARD LVCMOS33 [get_ports {out_a}]
#bottom_inst.OBUF_10
set_property SLEW SLOW [get_ports {out_b[0]}]
set_property IOSTANDARD LVCMOS18 [get_ports {out_b[0]}]
#bottom_inst.OBUF_11
set_property DRIVE 4 [get_ports {out_b[1]}]
set_property SLEW FAST [get_ports {out_b[1]}]
set_property IOSTANDARD LVCMOS25 [get_ports {out_b[1]}]
#bottom_inst.OBUF_9
set_property SLEW FAST [get_ports {led[2]}]
set_property IOSTANDARD DIFF_SSTL135 [get_ports {led[2]}]
#bottom_intermediate_inst.OBUF_8
set_property DRIVE 16 [get_ports {led[3]}]
set_property IOSTANDARD SSTL135 [get_ports {led[3]}]
#set_property INTERNAL_VREF 0.600 [get_iobanks 14]
#set_property INTERNAL_VREF 0.675 [get_iobanks 15]
#set_property INTERNAL_VREF 0.750 [get_iobanks 16]
#set_property INTERNAL_VREF 0.900 [get_iobanks 34]
#set_property INTERNAL_VREF 0.900 [get_iobanks 35]

There were the args when mentioned "ERROR :Couldn't find port [get_ports]
args:set_property
args:DRIVE
args:12
args:[get_ports]
port_name is wrong

args:set_property
args:IN_TERM
args:UNTUNED_SPLIT_40
args:[get_ports]
port_name is wrong

args:set_property
args:SLEW
args:FAST
args:[get_ports]
port_name is wrong

args:set_property
args:IOSTANDARD
args:SSTL135
args:[get_ports]
port_name is wrong

args:set_property
args:IN_TERM
args:UNTUNED_SPLIT_50
args:[get_ports]
port_name is wrong

args:set_property
args:SLEW
args:FAST
args:[get_ports]
port_name is wrong

args:set_property
args:IOSTANDARD
args:LVCMOS33
args:[get_ports]
port_name is wrong

args:set_property
args:SLEW
args:SLOW
args:[get_ports]
port_name is wrong

args:set_property
args:IOSTANDARD
args:LVCMOS18
args:[get_ports]
port_name is wrong

args:set_property
args:DRIVE
args:4
args:[get_ports]
port_name is wrong

args:set_property
args:SLEW
args:FAST
args:[get_ports]
port_name is wrong

args:set_property
args:IOSTANDARD
args:LVCMOS25
args:[get_ports]
port_name is wrong

args:set_property
args:SLEW
args:FAST
args:[get_ports]
port_name is wrong

args:set_property
args:IOSTANDARD
args:DIFF_SSTL135
args:[get_ports]
port_name is wrong

args:set_property
args:DRIVE
args:16
args:[get_ports]
port_name is wrong

args:set_property
args:IOSTANDARD
args:SSTL135
args:[get_ports]
port_name is wrong`
As the information,I think there may be a bug that the arg should be "led[0]" rather than "[get_ports]" @mithro

I changed the xdc to this :
#set_property LOC R2 [get_ports led] #OBUF_6 set_property DRIVE 12 led[0] #OBUF_7 set_property IN_TERM UNTUNED_SPLIT_40 led[1] set_property SLEW FAST led[1] set_property IOSTANDARD SSTL135 led[1] #OBUF_OUT set_property IN_TERM UNTUNED_SPLIT_50 [get_ports {out_a}] set_property SLEW FAST [get_ports {out_a}] set_property IOSTANDARD LVCMOS33 [get_ports {out_a}] #bottom_inst.OBUF_10 set_property SLEW SLOW [get_ports {out_b[0]}] set_property IOSTANDARD LVCMOS18 [get_ports {out_b[0]}] #bottom_inst.OBUF_11 set_property DRIVE 4 [get_ports {out_b[1]}] set_property SLEW FAST [get_ports {out_b[1]}] set_property IOSTANDARD LVCMOS25 [get_ports {out_b[1]}] #bottom_inst.OBUF_9 set_property SLEW FAST [get_ports {led[2]}] set_property IOSTANDARD DIFF_SSTL135 [get_ports {led[2]}] #bottom_intermediate_inst.OBUF_8 set_property DRIVE 16 [get_ports {led[3]}] set_property IOSTANDARD SSTL135 [get_ports {led[3]}] #set_property INTERNAL_VREF 0.600 [get_iobanks 14] #set_property INTERNAL_VREF 0.675 [get_iobanks 15] #set_property INTERNAL_VREF 0.750 [get_iobanks 16] #set_property INTERNAL_VREF 0.900 [get_iobanks 34] #set_property INTERNAL_VREF 0.900 [get_iobanks 35]
and the log as these:
`
args:set_property
args:DRIVE
args:12
args:led[0]
Setting parameter \DRIVE to value 12 on cell \OBUF_6

args:set_property
args:IN_TERM
args:UNTUNED_SPLIT_40
args:led[1]
Setting parameter \IN_TERM to value UNTUNED_SPLIT_40 on cell \OBUF_7

args:set_property
args:SLEW
args:FAST
args:led[1]
Setting parameter \SLEW to value FAST on cell \OBUF_7

args:set_property
args:IOSTANDARD
args:SSTL135
args:led[1]
Setting parameter \IOSTANDARD to value SSTL135 on cell \OBUF_7

args:set_property
args:IN_TERM
args:UNTUNED_SPLIT_50
args:[get_ports]
port_name is wrong
args:set_property
args:SLEW
args:FAST
args:[get_ports]
port_name is wrong
args:set_property
args:IOSTANDARD
args:LVCMOS33
args:[get_ports]
port_name is wrong
args:set_property
args:SLEW
args:SLOW
args:[get_ports]
port_name is wrong
args:set_property
args:IOSTANDARD
args:LVCMOS18
args:[get_ports]
port_name is wrong
args:set_property
args:DRIVE
args:4
args:[get_ports]
port_name is wrong
args:set_property
args:SLEW
args:FAST
args:[get_ports]
port_name is wrong
args:set_property
args:IOSTANDARD
args:LVCMOS25
args:[get_ports]
port_name is wrong
args:set_property
args:SLEW
args:FAST
args:[get_ports]
port_name is wrong
args:set_property
args:IOSTANDARD
args:DIFF_SSTL135
args:[get_ports]
port_name is wrong
args:set_property
args:DRIVE
args:16
args:[get_ports]
port_name is wrong
args:set_property
args:IOSTANDARD
args:SSTL135
args:[get_ports]
port_name is wrong
ReadXdc:execute finishend
`
From the log information, We can conclude that wrong happened while tcl parsing args!

I changed the code:
`
Tcl_Eval(interp, "proc unknown args { return [lindex $args 1] }");

// Tcl_Eval(interp, "proc unknown args { return \[[lindex $args 0]\] }");
`

And test log is here:
`
#set_property LOC R2 [get_ports led]
#OBUF_6
set_property DRIVE 12 [get_ports {led[0]}]
#OBUF_7
set_property IN_TERM UNTUNED_SPLIT_40 [get_ports {led[1]}]
set_property SLEW FAST [get_ports {led[1]}]
set_property IOSTANDARD SSTL135 [get_ports {led[1]}]
#OBUF_OUT
set_property IN_TERM UNTUNED_SPLIT_50 [get_ports {out_a}]
set_property SLEW FAST [get_ports {out_a}]
set_property IOSTANDARD LVCMOS33 [get_ports {out_a}]
#bottom_inst.OBUF_10
set_property SLEW SLOW [get_ports {out_b[0]}]
set_property IOSTANDARD LVCMOS18 [get_ports {out_b[0]}]
#bottom_inst.OBUF_11
set_property DRIVE 4 [get_ports {out_b[1]}]
set_property SLEW FAST [get_ports {out_b[1]}]
set_property IOSTANDARD LVCMOS25 [get_ports {out_b[1]}]
#bottom_inst.OBUF_9
set_property SLEW FAST [get_ports {led[2]}]
set_property IOSTANDARD DIFF_SSTL135 [get_ports {led[2]}]
#bottom_intermediate_inst.OBUF_8
set_property DRIVE 16 [get_ports {led[3]}]
set_property IOSTANDARD SSTL135 [get_ports {led[3]}]
#set_property INTERNAL_VREF 0.600 [get_iobanks 14]
#set_property INTERNAL_VREF 0.675 [get_iobanks 15]
#set_property INTERNAL_VREF 0.750 [get_iobanks 16]
#set_property INTERNAL_VREF 0.900 [get_iobanks 34]
#set_property INTERNAL_VREF 0.900 [get_iobanks 35]

args:set_property
args:DRIVE
args:12
args:led[0]
Setting parameter \DRIVE to value 12 on cell \OBUF_6

args:set_property
args:IN_TERM
args:UNTUNED_SPLIT_40
args:led[1]
Setting parameter \IN_TERM to value UNTUNED_SPLIT_40 on cell \OBUF_7

args:set_property
args:SLEW
args:FAST
args:led[1]
Setting parameter \SLEW to value FAST on cell \OBUF_7

args:set_property
args:IOSTANDARD
args:SSTL135
args:led[1]
Setting parameter \IOSTANDARD to value SSTL135 on cell \OBUF_7

args:set_property
args:IN_TERM
args:UNTUNED_SPLIT_50
args:out_a
Setting parameter \IN_TERM to value UNTUNED_SPLIT_50 on cell \OBUF_OUT

args:set_property
args:SLEW
args:FAST
args:out_a
Setting parameter \SLEW to value FAST on cell \OBUF_OUT

args:set_property
args:IOSTANDARD
args:LVCMOS33
args:out_a
Setting parameter \IOSTANDARD to value LVCMOS33 on cell \OBUF_OUT

args:set_property
args:SLEW
args:SLOW
args:out_b[0]
Setting parameter \SLEW to value SLOW on cell \bottom_inst.OBUF_10

args:set_property
args:IOSTANDARD
args:LVCMOS18
args:out_b[0]
Setting parameter \IOSTANDARD to value LVCMOS18 on cell \bottom_inst.OBUF_10

args:set_property
args:DRIVE
args:4
args:out_b[1]
Setting parameter \DRIVE to value 4 on cell \bottom_inst.OBUF_11

args:set_property
args:SLEW
args:FAST
args:out_b[1]
Setting parameter \SLEW to value FAST on cell \bottom_inst.OBUF_11

args:set_property
args:IOSTANDARD
args:LVCMOS25
args:out_b[1]
Setting parameter \IOSTANDARD to value LVCMOS25 on cell \bottom_inst.OBUF_11

args:set_property
args:SLEW
args:FAST
args:led[2]
Setting parameter \SLEW to value FAST on cell \bottom_inst.OBUF_9

args:set_property
args:IOSTANDARD
args:DIFF_SSTL135
args:led[2]
Setting parameter \IOSTANDARD to value DIFF_SSTL135 on cell \bottom_inst.OBUF_9

args:set_property
args:DRIVE
args:16
args:led[3]
Setting parameter \DRIVE to value 16 on cell \bottom_intermediate_inst.OBUF_8

args:set_property
args:IOSTANDARD
args:SSTL135
args:led[3]
Setting parameter \IOSTANDARD to value SSTL135 on cell \bottom_intermediate_inst.OBUF_8

ReadXdc:execute finishend
`
I think it means that I debug it, right or wrong?