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assert site_pin ('I') not in ['HARD1', 'HARD0'] #27
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Can you attach a DCP? |
That wire looks pretty boring, unclear what is going on. I'll take a look next week. |
I've found the issue. The problem has to do with the PUDC pin on 7-series parts. The relevant problematic code is here: https://github.com/SymbiFlow/symbiflow-xc-fasm2bels/blob/3b72e6f5beb09d85d2ba2957282ef2cf13933b0c/fasm2bels/models/iob_models.py#L322-L328 The proper solution here is to emit the PUDC, and during cleanup remove it if nothing actually connects to it. In your design, the PUDC pin is connected, so the code to simply skip it is broken. |
OK, from what I can tell this PUDC pin is still an IOB33, but it just also functions as the PUDC pin during configuration. I'm not sure that matters for fasm2bels. Currently I've just commented these lines out, and the code continues to treat it as any other IOB. Seems to be working fine, although it would be nice to verify somehow that this isn't causing problems elsewhere. Not familiar enough with the code base to understand the implication of commenting this out. |
Like you say, the PUDC does things during configuration. I believe the Vivado bitstream generator is emitting a PULLUP (or PULLDOWN) on the PUDC if the pin is unused. When a design doesn't use the PUDC pin is run through fasm2bels, we don't want to emit a IBUF if that IBUF isn't actually part of the design. When a design does use the PUDC pin, then the IBUF (or other) should be emitted. |
Fixed in #63 |
I'm trying to run fasm2bels for the attached design. fasm.zip. The bitstream was generated by Vivado 2019.2, and then the fasm created by
bit2fasm.py
.PART_FAMILY = "artix7"
PART = "xc7a200tsbg484-1"
It looks like the code is following a route, and then gets to a section of code with this label:
and then hits this assertion
https://github.com/SymbiFlow/symbiflow-xc-fasm2bels/blob/master/fasm2bels/make_routes.py#L562
It seems like it unexpectedly hitting an input pad? Any insight on what would in the design would cause this?
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