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base repository: amaranth-lang/amaranth
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base: 0802f943ba5c
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head repository: amaranth-lang/amaranth
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compare: cb81618c28d9
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  • 1 commit
  • 2 files changed
  • 1 contributor

Commits on Aug 26, 2020

  1. sim._pyrtl: fix miscompilation of -(Const(0b11, 2).as_signed()). 

    Fixes #473.
    @whitequark
    whitequark committed Aug 26, 2020
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    cb81618 View commit details
Showing with 9 additions and 1 deletion.
  1. +1 −1 nmigen/sim/_pyrtl.py
  2. +8 −0 nmigen/test/test_sim.py
2 changes: 1 addition & 1 deletion nmigen/sim/_pyrtl.py
View file
Original file line number Diff line number Diff line change
@@ -116,7 +116,7 @@ def sign(value):
if value.operator == "~":
return f"(~{self(arg)})"
if value.operator == "-":
return f"(-{self(arg)})"
return f"(-{sign(arg)})"
if value.operator == "b":
return f"bool({mask(arg)})"
if value.operator == "r|":
8 changes: 8 additions & 0 deletions nmigen/test/test_sim.py
View file
Original file line number Diff line number Diff line change
@@ -365,6 +365,7 @@ def test_rotate_right(self):
self.assertStatement(stmt, [C(0b1000000)], C(0b0000010))
self.assertStatement(stmt, [C(0b1000001)], C(0b0000110))


class SimulatorIntegrationTestCase(FHDLTestCase):
@contextmanager
def assertSimulation(self, module, deadline=None):
@@ -788,3 +789,10 @@ def test_bug_325_bis(self):
dut = Module()
dut.d.comb += Signal().eq(Repl(Const(1), 0))
Simulator(dut).run()

def test_bug_473(self):
sim = Simulator(Module())
def process():
self.assertEqual((yield -(Const(0b11, 2).as_signed())), 1)
sim.add_process(process)
sim.run()