GlasgowEmbedded · Aug 3, 2019 · Aug 3, 2019 · Aug 3, 2019 · Aug 4, 2019 · Aug 4, 2019
diff --git a/.gitignore b/.gitignore
@@ -1,12 +1,12 @@
 __pycache__/
 *.egg-info/
 *.eggs/
+dist/
 build/
 *.pyc
 *.v
 *.vcd
 *.gtkw
-*.ihex
 *.log
 *.*b[ac]k
 _autosave-*
@@ -19,3 +19,4 @@ _autosave-*
 /*.svf
 /*.bit
 /*.json
+/*.csv
diff --git a/.gitmodules b/.gitmodules
@@ -3,4 +3,4 @@
 	url = https://github.com/whitequark/libfx2
 [submodule "docs/archive"]
 	path = docs/archive
-	url = https://github.com/GlasgowEmbedded/Glasgow-Archive
+	url = https://github.com/GlasgowEmbedded/archive
diff --git a/.travis.yml b/.travis.yml
@@ -1,15 +1,17 @@
-dist: trusty
+dist: xenial
 sudo: required
 language: python
 python:
-  - "3.6"
+  - "3.7"
+  - "3.8"
 addons:
   apt:
     update: true
 before_install:
   - sudo apt install sdcc
+  - pip install yowasp-yosys yowasp-nextpnr-ice40-5k yowasp-nextpnr-ice40-8k
+  - export YOSYS=yowasp-yosys NEXTPNR_ICE40=yowasp-nextpnr-ice40 ICEPACK=yowasp-icepack
 install:
-  - "(cd vendor/libfx2/software && SDAR='sdcclib r' python setup.py install)"
-script:
   - "(cd software && python setup.py install)"
-  - "(cd software && python setup.py test)"
+script:
+  - "(cd software && python -W ignore::DeprecationWarning test.py)"
diff --git a/README.md b/README.md
@@ -2,7 +2,7 @@
 
 **Want one? [Subscribe here](https://mailchi.mp/44980ff6f0ab/glasgow-announcements).**
 
-**Let's chat! [Our IRC channel is #glasgow at freenode.net](https://webchat.freenode.net/?channels=glasgow).**
+**Let's chat! Our IRC channel is [#glasgow at freenode.net](https://webchat.freenode.net/?channels=glasgow); our Discord channel is [#glasgow at 1BitSquared's Discord server](https://1bitsquared.com/pages/chat).**
 
 **Important note: if you are looking to assemble boards yourself, use only revC1.**
 
@@ -26,13 +26,17 @@ Some of the tasks Glasgow can do well are:
     * determine memory parameters via SFDP,
   * read and write ONFI-compatible Flash memories,
     * determine memory parameters via ONFI parameter page,
+  * read and write parallel 27/28/29-series EPROMs, EEPROMs and Flash memories,
+    * determine the extent of floating gate charge decay and rescue data,
   * program and verify AVR microcontrollers with SPI interface,
   * automatically determine unknown JTAG pinout,
   * play back JTAG SVF files,
   * debug ARC processors via JTAG,
   * debug some MIPS processors via EJTAG,
   * program and verify XC9500XL CPLDs via JTAG,
-  * synthesize sound using a Yamaha OPL chip and play it in real time on a webpage,
+  * communicate using nRF24L01(+) radios,
+  * program nRF24LE1 and nRF24LU1(+) microcontrollers,
+  * synthesize sound using a Yamaha OPLx/OPM chip and play it in real time on a webpage,
   * read raw modulated data from 5.25"/3.5" floppy drives,
   * ... and more!
 
@@ -58,13 +62,13 @@ Revisions A and B have not been produced in significant amounts, contain major d
 
 ![Overview of the Glasgow PCB](hardware/boards/glasgow/3drender-readme.png)
 
-Revision C is the latest revision and is being prepared for mass production. It provides 16 I/O pins with a maximum frequency of approx. 100 MHz\*, independent direction control and independent programmable pull-up/pull-down resistors. The I/O pins are grouped into two I/O ports that can use any voltage from 1.8 V to 5 V, sense and monitor I/O voltage of the device under test, as well as provide up to 150 mA of power. The board uses USB 2 for power, configuration, and communication, achieving up to 336 Mbps (42 MB/s) of sustained combined throughput.
+Revision C is the latest revision and is being prepared for mass production. It provides 16 I/O pins with a maximum data rate of approx. 200 Mbps/pin (100 MHz)\*, independent direction control and independent programmable pull-up/pull-down resistors. The I/O pins are grouped into two I/O ports, each of which can use any voltage from 1.8 V to 5 V, sense and monitor I/O voltage of the device under test, as well as provide up to 150 mA of power. The board uses USB 2 for power, configuration, and communication, achieving up to 336 Mbps (42 MB/s) of sustained combined throughput.
 
-<sub>\* Maximum frequency achievable in practice depends on many factors and will vary greatly with specific interface and applet design. 24 MHz non-DDR can be achieved for most interfaces with minimal effort.</sub>
+<sub>\* Maximum data rate achievable in practice depends on many factors and will vary greatly with specific interface and applet design. 12 Mbps/pin (6 MHz) can be achieved with minimal development effort; reaching higher data rates requires careful HDL coding and a good understanding of timing analysis.</sub>
 
 ## What software does Glasgow use?
 
-Glasgow is written entirely in Python 3. The interface logic that runs on the FPGA is described using [Migen](https://m-labs.hk/migen/), which is a Python-based domain specific language. The supporting code that runs on the host PC is written in Python with [asyncio](https://docs.python.org/3/library/asyncio.html). This way, the logic on the FPGA can be assembled on demand for any requested configuration, keeping it as fast and compact as possible, and code can be shared between gateware and software, removing the need to add error-prone "glue" boilerplate.
+Glasgow is written entirely in Python 3. The interface logic that runs on the FPGA is described using [nMigen](https://github.com/nmigen/nmigen/), which is a Python-based domain specific language. The supporting code that runs on the host PC is written in Python with [asyncio](https://docs.python.org/3/library/asyncio.html). This way, the logic on the FPGA can be assembled on demand for any requested configuration, keeping it as fast and compact as possible, and code can be shared between gateware and software, removing the need to add error-prone "glue" boilerplate.
 
 Glasgow would not be possible without the [open-source iCE40 FPGA toolchain](http://www.clifford.at/icestorm/), which is not only very reliable but also extremely fast. It is so fast that FPGA bitstreams are not cached (beyond not rebuilding the bitstream already on the device), as it only takes a few seconds to build one from scratch for something like an UART. When developing a new applet it is rarely necessary to wait for the toolchain.
 
@@ -74,46 +78,96 @@ Debugging new applets can be hard, especially if bidirectional buses are involve
 
 ## How do I use Glasgow?
 
+**If these instructions don't work for you, please file it as a bug, so that the experience can be made more smooth for everyone.**
+
 ### ... with Linux?
 
-You will need Python 3.6 (or a newer version, in which case replace `3.6` with that version below) and sdcc. On a Debian or Ubuntu system these can be installed with:
+You will need git and Python 3.7 (or a newer version, in which case replace `3.7` with that version below). On a Debian or Ubuntu system these can be installed with:
+
+    apt-get install --no-install-recommends git python3.7 python3-setuptools \
+      python3-libusb1 python3-aiohttp python3-bitarray python3-crcmod
 
-    apt-get install python3.6 sdcc
+You will also need Yosys and nextpnr-ice40, both from the master branch. Follow the setup instructions for [Yosys](https://github.com/yosysHQ/yosys/#setup) and [nextpnr](https://github.com/YosysHQ/nextpnr/#nextpnr-ice40).
 
 Obtain the source code:
 
-    git clone https://github.com/GlasgowEmbedded/Glasgow
-    cd Glasgow
+    git clone https://github.com/GlasgowEmbedded/glasgow
+    cd glasgow
 
 Configure your system to allow unprivileged access (for anyone in the `plugdev` group) to the Glasgow hardware:
 
     sudo cp config/99-glasgow.rules /etc/udev/rules.d
 
-Install the dependencies and the binaries for the current user:
+Install the dependencies and the scripts for the current user:
 
     cd software
-    python3.6 setup.py develop --user
+    python3.7 setup.py develop --user
 
-The binaries are placed in `$HOME/.local/bin`, so be sure to add that directory to the `PATH` environment variable; after this, you can run `glasgow` from a terminal. Instead of adjusting `PATH` it is also possible to use `python3.6 -m glasgow.cli`.
+The scripts are placed in `$HOME/.local/bin`, so be sure to add that directory to the `PATH` environment variable; after this, you can run `glasgow` from a terminal. Instead of adjusting `PATH` it is also possible to use `python3.7 -m glasgow.cli`.
 
 To update the source code, do:
 
-    cd Glasgow
+    cd glasgow
     git pull
+
+### ... with macOS?
+
+If you haven't already, install [Homebrew](https://brew.sh/). Now:
+
+    brew install python
+    brew tap ktemkin/oss-fpga
+    brew install --HEAD icestorm yosys nextpnr-ice40
+
+Obtain the source code:
+
+    git clone https://github.com/GlasgowEmbedded/glasgow
+    cd glasgow
+
+Install the dependencies and the scripts for the current user:
+
     cd software
-    python3.6 setup.py build_ext
+    python setup.py develop
+
+The scripts will be installed in `/usr/local/bin`, which should already be in your `PATH`.
 
 ### ... with Windows?
 
 Although first-class Windows support is an important goal and Glasgow already works on Windows, the installation process is not yet ready.
 
+## How do I factory flash Glasgow?
+
+"Factory flashing" refers to the process of assigning a brand new Glasgow board (that you probably just assembled) a serial number, as well as writing a few critical configuration options that will let the normal Glasgow CLI pick up this device. Barring severe and unusual EEPROM corruption, this process is performed only once for each board.
+
+As a prerequisite to factory flashing, follow all steps from the "[How do I use Glasgow?](#how-do-i-use-glasgow)" section.
+
+Any board that is factory flashed must have a blank FX2_MEM EEPROM. If the FX2_MEM EEPROM is not completely erased (all bytes set to `FF`), the factory flashing process may fail.
+
+### ... with Linux?
+
+Configure your system to allow unprivileged access (for anyone in the `plugdev` group) to any hardware that enumerates as the Cypress FX2 ROM bootloader:
+
+    sudo cp config/99-cypress.rules /etc/udev/rules.d
+
+Note that this udev rule will affect more devices than just Glasgow, since the Cypress VID:PID pair is shared.
+
+Plug in the newly assembled device. At this point, `lsusb | grep 04b4:8613` should list one entry. Assuming you are factory flashing a board revision C1, run:
+
+    glasgow factory --rev C1
+
+Done! At this point, `lsusb | grep 20b7:9db1` should list one entry.
+
+### ... with Windows?
+
+See [above](#-with-windows).
+
 ## Who made Glasgow?
 
   * [@whitequark](https://github.com/whitequark) came up with the design, coordinates the project and implements most of gateware and software;
   * [@awygle](https://github.com/awygle) designed the power/analog port circuitry and helped with layout of revB;
   * [@marcan](https://github.com/marcan) improved almost every aspect of hardware for revC;
   * [@esden](https://github.com/esden) is handling batch manufacturing;
   * [@smunaut](https://github.com/smunaut) provided advice crucial for stability and performance of USB communication;
+  * [@electronic_eel](https://github.com/electronic_eel) designed the test jig and advanced protection circuitry;
   * ... and many [other people](https://github.com/GlasgowEmbedded/Glasgow/graphs/contributors).
 
 ## License

diff --git a/config/99-cypress.rules b/config/99-cypress.rules
@@ -0,0 +1,2 @@
+SUBSYSTEM=="usb", ATTRS{idVendor}=="04b4", ATTRS{idProduct}=="8613", \
+  MODE="0660", GROUP="plugdev", TAG+="uaccess"
diff --git a/docs/archive b/docs/archive
diff --git a/examples/boilerplate.py b/examples/boilerplate.py
@@ -1,13 +1,19 @@
 import logging
 import asyncio
-from migen import *
+from nmigen import *
 
 from ... import *
 
 
-class BoilerplateSubtarget(Module):
+class BoilerplateSubtarget(Elaboratable):
     def __init__(self, pads, in_fifo, out_fifo):
-        pass
+        self.pads     = pads
+        self.in_fifo  = in_fifo
+        self.out_fifo = out_fifo
+
+    def elaborate(self, platform):
+        m = Module()
+        return m
 
 
 class BoilerplateApplet(GlasgowApplet, name="boilerplate"):

diff --git a/examples/i2c-pcf8574.py b/examples/i2c-pcf8574.py
@@ -0,0 +1,16 @@
+"""
+An example of a script that can be used with the run-script mode.
+
+This will read and write the pins of a PCF8574. Once connected, run:
+
+    glasgow run-script i2c-pcf8574.py i2c-initiator -V 3.3
+"""
+
+# read pin values
+print('I/O pin state: 0b{:08b}'.format((await iface.read(0x20, 1))[0]))
+
+# write pin values
+await iface.write(0x20, [ 0x55 ])
+
+# power down the device after use
+await device.set_voltage("AB", 0)
diff --git a/firmware/.gitignore b/firmware/.gitignore
@@ -0,0 +1 @@
+*.ihex
diff --git a/firmware/dac_ldo.c b/firmware/dac_ldo.c
@@ -15,16 +15,17 @@ static const struct buffer_desc buffers[] = {
 
 void iobuf_init_dac_ldo() {
   // Configure I/O buffer pins as open-source/open-drain; they have 100k pulls
-  IOD  = IOD & ~((1<<PIND_ENVA)|(1<<PIND_ENVB)) | (1<<PIND_OEQ_N);
-  OED |=        ((1<<PIND_ENVA)|(1<<PIND_ENVB)  | (1<<PIND_OEQ_N));
+  IOD  = IOD & ~((1<<PIND_ENVA)|(1<<PIND_ENVB)) | (1<<PIND_OEQ_N_REVAB);
+  OED |=        ((1<<PIND_ENVA)|(1<<PIND_ENVB)  | (1<<PIND_OEQ_N_REVAB));
 
-  // Enable I/O buffers
-  IOD &= ~ (1<<PIND_OEQ_N);
+  // Enable I/O buffers, just existing on revAB
+  IOD &= ~ (1<<PIND_OEQ_N_REVAB);
 }
 
 void iobuf_enable(bool on) {
-  if(on) IOD &= ~(1<<PIND_OEQ_N);
-  else   IOD |=  (1<<PIND_OEQ_N);
+  // I/O buffers just existing on revAB, pin is unconnected on revC
+  if(on) IOD &= ~(1<<PIND_OEQ_N_REVAB);
+  else   IOD |=  (1<<PIND_OEQ_N_REVAB);
 }
 
 static bool dac_start(uint8_t mask, bool read) {

diff --git a/firmware/glasgow.h b/firmware/glasgow.h
@@ -3,8 +3,11 @@
 
 #include <stdbool.h>
 
-#define VID_QIHW              0x20b7
-#define PID_GLASGOW           0x9db1
+#define VID_CYPRESS   0x04b4
+#define PID_FX2       0x8613
+
+#define VID_QIHW      0x20b7
+#define PID_GLASGOW   0x9db1
 
 enum {
   // Board revisions
@@ -32,7 +35,7 @@ enum {
 #define PIND_LED_ACT          4
 #define PIND_LED_ERR          5
 #define PIND_ENVB             6
-#define PIND_OEQ_N            7
+#define PIND_OEQ_N_REVAB      7
 
 enum {
   // I2C addresses (unshifted)
@@ -63,7 +66,7 @@ enum {
 #define BITSTREAM_ID_SIZE 16
 
 __xdata __at(0x4000 - CONF_SIZE) struct glasgow_config {
-  char      revision;
+  uint8_t   revision;
   char      serial[16];
   uint32_t  bitstream_size;
   char      bitstream_id[BITSTREAM_ID_SIZE];

diff --git a/firmware/main.c b/firmware/main.c
@@ -127,7 +127,12 @@ usb_configuration_c usb_config_1_pipe = {
   }
 };
 
+// check for "earlier than 3.5", but version macros shipped in 3.6
+#if !defined(__SDCC_VERSION_MAJOR)
+__code const struct usb_configuration *__code const usb_configs[] = {
+#else
 usb_configuration_set_c usb_configs[] = {
+#endif
   &usb_config_2_pipes,
   &usb_config_1_pipe,
 };
@@ -137,8 +142,8 @@ usb_ascii_string_c usb_strings[] = {
   [1] = "Glasgow Debug Tool",
   [2] = "XX-XXXXXXXXXXXXXXXX",
   // Configurations
-  [3] = "Pipe Q at {2x512B EP2OUT/EP6IN}, R at {2x512B EP4OUT/EP8IN}",
-  [4] = "Pipe Q at {4x512B EP2OUT/EP6IN}",
+  [3] = "Pipe P at {2x512B EP2OUT/EP6IN}, Q at {2x512B EP4OUT/EP8IN}",
+  [4] = "Pipe P at {4x512B EP2OUT/EP6IN}",
   // Interfaces
   [5] = "Disabled",
   [6] = "Double-buffered 512B",
@@ -253,6 +258,10 @@ static void descriptors_init() {
   desc_serial[1] = '0' + (glasgow_config.revision & 0xF);
   xmemcpy(&desc_serial[3], (__xdata void *)glasgow_config.serial,
           sizeof(glasgow_config.serial));
+  if(glasgow_config.revision == GLASGOW_REV_NA) {
+    desc_device->idVendor  = VID_CYPRESS;
+    desc_device->idProduct = PID_FX2;
+  }
 }
 
 enum {
@@ -419,6 +428,15 @@ void handle_pending_usb_setup() {
           arg_chip  = I2C_ADDR_ICE_MEM + 1;
           page_size = 8;
           break;
+        case 3:
+          // The HX8K bitstream is slightly (less than 4 KB) larger than the capacity of ICE_MEM,
+          // so we stuff the very tail end of the bitstream back into FX2_MEM. It's necessary to
+          // make sure the writes don't wrap, or we can overwrite the configuration info.
+          if(arg_addr <= 0x1000 && arg_len <= 0x1000 && (arg_addr + arg_len) <= 0x1000) {
+            arg_chip  = I2C_ADDR_FX2_MEM;
+            page_size = 6; // 64 bytes
+            arg_addr += 0x7000;
+          }
       }
     }
     pending_setup = false;
@@ -829,17 +847,29 @@ int main() {
       if(length < chunk_len)
         chunk_len = length;
 
-      if(!eeprom_read(chip, addr, (uint8_t *)&scratch, chunk_len, /*double_byte=*/true))
+      if(!eeprom_read(chip, addr, (uint8_t *)&scratch, chunk_len, /*double_byte=*/true)) {
+        latch_status_bit(ST_ERROR);
         break;
+      }
       fpga_load((__xdata uint8_t *)scratch, chunk_len);
 
       length -= chunk_len;
       addr   += chunk_len;
-      if(addr == 0)
-        chip += 1; // address wraparound
+      if(addr == 0) {
+        // Advance to the next logical chip in case of address wraparound.
+        chip += 1;
+        if(chip == I2C_ADDR_ICE_MEM + 2) {
+          // See explanation in USB_REQ_EEPROM.
+          chip  = I2C_ADDR_FX2_MEM;
+          addr += 0x7000;
+        }
+      }
     }
-    if(length == 0)
+    if(length == 0) {
       fpga_start();
+      if(!fpga_is_ready())
+        latch_status_bit(ST_ERROR);
+    }
 
     led_act_set(false);
   }
Original file line number	Diff line number	Diff line change
		@@ -0,0 +1,2 @@
		SUBSYSTEM=="usb", ATTRS{idVendor}=="04b4", ATTRS{idProduct}=="8613", \
		MODE="0660", GROUP="plugdev", TAG+="uaccess"
+ −		G00039/UG380 Spartan-6 FPGA Configuration User Guide v2.11.pdf
+ −		G00040/nRF24L01 Preliminary Product Specification v1.2.pdf
+ −		G00041/nRF24L01+ Preliminary Product Specification v1.0.pdf
+ −		G00042/pca9534.pdf
+ −		G00043/ina260.pdf
+ −		G00044/nRF24L01P_PS_v1.0.pdf
+ −		G00045/flash-guide.pdf
+ −		G00046/MAEC-MCU-M16C-95-0302-R1.pdf
+ −		G00047/REJ05B0734.pdf
+ −		G00048/CC1110_CC2430_CC2510 Debug and Programming Interface Specification Rev. 1.2.pdf
+ −		G00049/hx711_english.pdf
+ −		G00050/bst-bme280-ds002.pdf
+ −		G00051/Samtech_SX1272_73_rev4.pdf
+ −		G00052/lorawan1.0.3.pdf
+ −		G00053/pms5003-manual_v2-3.pdf
+ −		G00054/pms7003.pdf
+ −		G00055/PALCE16V8.pdf
+ −		G00056/AT29C256.pdf
+ −		G00057/11173G.pdf
+ −		G00058/Atmel-7766-8-bit-AVR-ATmega16U4-32U4_Datasheet.pdf