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If I run the following python script:
from nmigen import * class TestLEDModule( Elaboratable ): def __init__( self ): self.count = Signal( 32, reset = 0 ) def elaborate( self, platform ): m = Module() m.d.sync += self.count.eq( self.count + 1 ) return m from nmigen_boards.upduino_v2 import * if __name__ == "__main__": dut = TestLEDModule() UpduinoV2Platform().build( dut )
I get the following error:
ERROR: Invalid HFOSC divider value '0b0' - expecting 0b00, 0b01, 0b10 or 0b11 ERROR: Packing design failed.
Making the following change appears to fix it
diff --git a/nmigen/vendor/lattice_ice40.py b/nmigen/vendor/lattice_ice40.py index 14026fa..d5e4dd6 100644 --- a/nmigen/vendor/lattice_ice40.py +++ b/nmigen/vendor/lattice_ice40.py @@ -379,7 +379,7 @@ class LatticeICE40Platform(TemplatedPlatform): m.submodules += Instance("SB_HFOSC", i_CLKHFEN=1, i_CLKHFPU=1, - p_CLKHF_DIV="0b{0:b}".format(self.hfosc_div), + p_CLKHF_DIV="0b{0:02b}".format(self.hfosc_div), o_CLKHF=clk_i) delay = int(100e-6 * self.default_clk_frequency) # Internal low-speed clock: 10 KHz.
I've only just started using nmigen today, so it's always possible that I'm doing some thing silly. I'm happy to send a PR if you'd like.
The text was updated successfully, but these errors were encountered:
This is clearly a bug--most likely, the code in question predates improved syntax checking in nextpnr. Please send a PR.
Sorry, something went wrong.
Lattice ICE40: Zero-pad CLKHF_DIV
470024f
Fixes amaranth-lang#520
vendor.lattice_ice40: zero-pad CLKHF_DIV in SB_HFOSC instance.
781a3aa
Fixes #520.
Successfully merging a pull request may close this issue.
If I run the following python script:
I get the following error:
Making the following change appears to fix it
I've only just started using nmigen today, so it's always possible that I'm doing some thing silly. I'm happy to send a PR if you'd like.
The text was updated successfully, but these errors were encountered: