It would be fantastic to have a logic analyzer integrated into the language.
Most logic analyzers seem to be bolted on and are quite cumbersome to use.

Most basic use case would be something like:

foo = Signal(trace=True)

but also a method for matching signals with regular expressions
would be highly useful:

ila.trace_matching_signals("wishbone.*cyc")

Also having the trace trigger command built into the language would be fantastic:

ila.trigger()

Not sure yet about how the data retrieval should work.
Maybe a wishbone style memory interface to the ringbuffer or so.