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base repository: azonenberg/starshipraider
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  • 1 commit
  • 3 files changed
  • 1 contributor

Commits on Jul 10, 2020

  1. Routed a good chunk of the left side of the RAM

    @azonenberg
    azonenberg committed Jul 10, 2020

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    servalcatty
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    74682bd View commit details
Showing with 949 additions and 914 deletions.
  1. +1 −1 boards/MAXWELL/maxwell-main/leftpods.sch
  2. +896 −861 boards/MAXWELL/maxwell-main/maxwell-main.kicad_pcb
  3. +52 −52 boards/MAXWELL/maxwell-main/ram.sch
2 changes: 1 addition & 1 deletion boards/MAXWELL/maxwell-main/leftpods.sch
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Original file line number Diff line number Diff line change
@@ -3,7 +3,7 @@ EELAYER 30 0
EELAYER END
$Descr A3 16535 11693
encoding utf-8
Sheet 12 18
Sheet 11 18
Title "MAXWELL Main Board"
Date "2020-07-09"
Rev "0.1"
1,757 changes: 896 additions & 861 deletions boards/MAXWELL/maxwell-main/maxwell-main.kicad_pcb
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104 changes: 52 additions & 52 deletions boards/MAXWELL/maxwell-main/ram.sch
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@@ -316,93 +316,71 @@ Text Label 5150 1400 2 50 ~ 0
DDR_CLK0_P
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$EndSCHEMATC