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nMigen-Yosys isn't detected by require_tool #419
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That's intended behavior--nmigen-yosys cannot be used for synthesis (in the platform). It can only be used for Verilog and CXX conversion (in the backends). |
Did you expect to be able to use nmigen-yosys for synthesis based on documentation or for some other reason? The README and the PyPI package description should mention that, maybe we should mention it elsewhere? |
Oh yeah and if you'd like to use a full build Yosys that can be used for synthesis, check out YoWASP, which also includes PNR tools. |
I thought it would work for platforms that only rely on verilog code generation in Yosys (like ECP5 with Diamond) but I wasn't considering the platforms that use yosys for their synthesis. That means if we want to be able to use nmigen-yosys in platforms we'd have to specify if we need a Yosys version that has the features we need, which will add more code than reasonable => I'm closing this issue. Regarding YoWASP, how can you use it with nMigen since the executables are prefixed? |
It is actually supposed to work for that--are you in fact using Diamond? If you are, then this is a bug and we should reopen it.
Maybe we should add some easier way to integrate the two but I wasn't able to come with a nice proposal yet. |
Nope but I'm using a custom platform based off the ECP5 platform definition (I need a Verilog file with all the I/O and specials cells instantiated that I can feed in Icarus Verilog with Diamond's Verilog models to emulate everything on my FPGA board). Diamond users should theoretically face the same issues as I do because the Yosys executable they use to generate verilog comes from the "require_tool" function (https://github.com/nmigen/nmigen/blob/master/nmigen/vendor/lattice_ecp5.py#L178-L182). I'm okay with using env variables for setting which Yosys executable to use, I think it's a good approach. |
Ah right, so I think the problem here is that |
Traceback:
This happens when Yosys is requested in a platform class.
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