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base repository: azonenberg/starshipraider
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head repository: azonenberg/starshipraider
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compare: bc97999b4420
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  • 1 commit
  • 3 files changed
  • 1 contributor

Commits on Jul 6, 2020

  1. Continued MCU subsystem layout, initial routing of 5V power

    @azonenberg
    azonenberg committed Jul 6, 2020
    Copy the full SHA
    bc97999 View commit details
Showing with 1,323 additions and 768 deletions.
  1. +1,300 −727 boards/MAXWELL/maxwell-main/maxwell-main.kicad_pcb
  2. +23 −24 boards/MAXWELL/maxwell-main/mcu.sch
  3. +0 −17 boards/MAXWELL/maxwell-main/ram.sch
2,027 changes: 1,300 additions & 727 deletions boards/MAXWELL/maxwell-main/maxwell-main.kicad_pcb
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47 changes: 23 additions & 24 deletions boards/MAXWELL/maxwell-main/mcu.sch
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Original file line number Diff line number Diff line change
@@ -171,8 +171,6 @@ F 3 "" H 8600 6350 50 0001 C CNN
10 8600 6400
1 0 0 -1
$EndComp
Text HLabel 5000 4150 0 50 BiDi ~ 0
K7_INIT_B
Text HLabel 7000 2450 0 50 Output ~ 0
K7_RST_N
Text HLabel 7000 3450 0 50 Input ~ 0
@@ -1060,17 +1058,6 @@ F 3 "" H 14400 5850 50 0001 C CNN
1 0 0 -1
$EndComp
$Comp
L device:C C267
U 1 1 6098761A
P 14950 5850
F 0 "C267" H 15065 5896 50 0000 L CNN
F 1 "0.47 uF" H 15065 5805 50 0000 L CNN
F 2 "azonenberg_pcb:EIA_0402_CAP_NOSILK" H 14988 5700 50 0001 C CNN
F 3 "" H 14950 5850 50 0001 C CNN
1 14950 5850
1 0 0 -1
$EndComp
$Comp
L device:C C268
U 1 1 60987C12
P 15500 5850
@@ -1081,22 +1068,12 @@ F 3 "" H 15500 5850 50 0001 C CNN
1 15500 5850
1 0 0 -1
$EndComp
Wire Wire Line
15500 6000 14950 6000
Connection ~ 14400 6000
Wire Wire Line
14400 6000 13900 6000
Connection ~ 14950 6000
Wire Wire Line
14950 6000 14400 6000
Wire Wire Line
13900 5700 14400 5700
Connection ~ 14400 5700
Wire Wire Line
14400 5700 14950 5700
Connection ~ 14950 5700
Wire Wire Line
14950 5700 15500 5700
Text Label 13900 5700 2 50 ~ 0
3V3
Text Label 13900 6000 2 50 ~ 0
@@ -2284,5 +2261,27 @@ NoConn ~ 8300 2450
NoConn ~ 8300 2550
NoConn ~ 8300 2350
NoConn ~ 3250 3750
NoConn ~ 7000 2550
Text HLabel 7000 2550 0 50 BiDi ~ 0
K7_INIT_B
Wire Wire Line
14400 5700 15000 5700
Wire Wire Line
14400 6000 15000 6000
$Comp
L device:C C267
U 1 1 651B7B86
P 15000 5850
F 0 "C267" H 15115 5896 50 0000 L CNN
F 1 "4.7 uF" H 15115 5805 50 0000 L CNN
F 2 "azonenberg_pcb:EIA_0603_CAP_NOSILK" H 15038 5700 50 0001 C CNN
F 3 "" H 15000 5850 50 0001 C CNN
1 15000 5850
1 0 0 -1
$EndComp
Connection ~ 15000 5700
Wire Wire Line
15000 5700 15500 5700
Connection ~ 15000 6000
Wire Wire Line
15000 6000 15500 6000
$EndSCHEMATC
17 changes: 0 additions & 17 deletions boards/MAXWELL/maxwell-main/ram.sch
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Original file line number Diff line number Diff line change
@@ -1778,21 +1778,4 @@ F 3 "~" H 8500 8300 50 0001 C CNN
$EndComp
Text Label 8700 8300 0 50 ~ 0
RAM_VTT
$Comp
L Connector:Conn_01x03 TP8
U 1 1 62DC5193
P 9900 6900
F 0 "TP8" H 9980 6942 50 0000 L CNN
F 1 "Conn_01x03" H 9980 6851 50 0000 L CNN
F 2 "azonenberg_pcb:CONN_HEADER_2.54MM_1x3" H 9900 6900 50 0001 C CNN
F 3 "~" H 9900 6900 50 0001 C CNN
1 9900 6900
1 0 0 -1
$EndComp
Text Label 9700 6800 2 50 ~ 0
I2C2_SDA
Text Label 9700 6900 2 50 ~ 0
I2C2_SCL
Text Label 9700 7000 2 50 ~ 0
GND
$EndSCHEMATC