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base repository: amaranth-lang/amaranth
base: 145bca095fed
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head repository: amaranth-lang/amaranth
compare: 091cd08e4f4a
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  • 5 commits
  • 8 files changed
  • 1 contributor

Commits on Jul 11, 2020

  1. sim.pysim: use VCD aliases to reduce space and time overhead. 

    On Minerva SoC, this reduces VCD file size by about 35%, and reduces
runtime overhead of writing VCDs by 10% or less.
    @whitequark
    whitequark committed Jul 11, 2020
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Commits on Jul 13, 2020

  1. _toolchain.cxx: new toolchain.

    @whitequark
    whitequark committed Jul 13, 2020
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  2. wip

    @whitequark
    whitequark committed Jul 13, 2020
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  3. wip

    @whitequark
    whitequark committed Jul 13, 2020
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  4. wip

    @whitequark
    whitequark committed Jul 13, 2020
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